[llvm] fd68c7d - [LoongArch] Override TargetLowering::hasAndNotCompare()
via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 2 22:27:52 PST 2023
Author: gonglingqin
Date: 2023-02-03T14:18:50+08:00
New Revision: fd68c7d223fd2d544496dd6b3b06baf6f4d8d3dc
URL: https://github.com/llvm/llvm-project/commit/fd68c7d223fd2d544496dd6b3b06baf6f4d8d3dc
DIFF: https://github.com/llvm/llvm-project/commit/fd68c7d223fd2d544496dd6b3b06baf6f4d8d3dc.diff
LOG: [LoongArch] Override TargetLowering::hasAndNotCompare()
Override hasAndNotCompare() to use more `ANDN` instead of using `AND`
and `NOT`.
This patch enables the following transforms:
(X & Y) == Y ---> (~X & Y) == 0
(X & Y) != Y ---> (~X & Y) != 0.
Differential Revision: https://reviews.llvm.org/D143037
Added:
Modified:
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
llvm/lib/Target/LoongArch/LoongArchISelLowering.h
llvm/test/CodeGen/LoongArch/andn-icmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index d4684a589100a..de720c5ece898 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -3187,3 +3187,11 @@ bool LoongArchTargetLowering::isLegalAddressingMode(const DataLayout &DL,
return true;
}
+
+bool LoongArchTargetLowering::hasAndNotCompare(SDValue Y) const {
+ // TODO: Support vectors.
+ if (Y.getValueType().isVector())
+ return false;
+
+ return !isa<ConstantSDNode>(Y);
+}
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index bb4341e2a3e30..f7b3305ad094a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -187,6 +187,8 @@ class LoongArchTargetLowering : public TargetLowering {
unsigned AS,
Instruction *I = nullptr) const override;
+ bool hasAndNotCompare(SDValue Y) const override;
+
private:
/// Target-specific function used to lower LoongArch calling conventions.
typedef bool LoongArchCCAssignFn(const DataLayout &DL, LoongArchABI::ABI ABI,
diff --git a/llvm/test/CodeGen/LoongArch/andn-icmp.ll b/llvm/test/CodeGen/LoongArch/andn-icmp.ll
index 9607041abfc46..ff6935e2e23cc 100644
--- a/llvm/test/CodeGen/LoongArch/andn-icmp.ll
+++ b/llvm/test/CodeGen/LoongArch/andn-icmp.ll
@@ -2,22 +2,16 @@
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
-;; TODO: Enables the following transforms:
-;; (X & Y) == Y ---> (~X & Y) == 0
-;; (X & Y) != Y ---> (~X & Y) != 0.
-
define i1 @andn_icmp_eq_i8(i8 signext %a, i8 signext %b) nounwind {
; LA32-LABEL: andn_icmp_eq_i8:
; LA32: # %bb.0:
-; LA32-NEXT: and $a0, $a0, $a1
-; LA32-NEXT: xor $a0, $a0, $a1
+; LA32-NEXT: andn $a0, $a1, $a0
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: ret
;
; LA64-LABEL: andn_icmp_eq_i8:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: ret
%and = and i8 %a, %b
@@ -28,15 +22,13 @@ define i1 @andn_icmp_eq_i8(i8 signext %a, i8 signext %b) nounwind {
define i1 @andn_icmp_eq_i16(i16 signext %a, i16 signext %b) nounwind {
; LA32-LABEL: andn_icmp_eq_i16:
; LA32: # %bb.0:
-; LA32-NEXT: and $a0, $a0, $a1
-; LA32-NEXT: xor $a0, $a0, $a1
+; LA32-NEXT: andn $a0, $a1, $a0
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: ret
;
; LA64-LABEL: andn_icmp_eq_i16:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: ret
%and = and i16 %a, %b
@@ -47,15 +39,13 @@ define i1 @andn_icmp_eq_i16(i16 signext %a, i16 signext %b) nounwind {
define i1 @andn_icmp_eq_i32(i32 signext %a, i32 signext %b) nounwind {
; LA32-LABEL: andn_icmp_eq_i32:
; LA32: # %bb.0:
-; LA32-NEXT: and $a0, $a0, $a1
-; LA32-NEXT: xor $a0, $a0, $a1
+; LA32-NEXT: andn $a0, $a1, $a0
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: ret
;
; LA64-LABEL: andn_icmp_eq_i32:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: ret
%and = and i32 %a, %b
@@ -74,8 +64,7 @@ define i1 @andn_icmp_eq_i64(i64 %a, i64 %b) nounwind {
;
; LA64-LABEL: andn_icmp_eq_i64:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: ret
%and = and i64 %a, %b
@@ -86,15 +75,13 @@ define i1 @andn_icmp_eq_i64(i64 %a, i64 %b) nounwind {
define i1 @andn_icmp_ne_i8(i8 signext %a, i8 signext %b) nounwind {
; LA32-LABEL: andn_icmp_ne_i8:
; LA32: # %bb.0:
-; LA32-NEXT: and $a0, $a0, $a1
-; LA32-NEXT: xor $a0, $a0, $a1
+; LA32-NEXT: andn $a0, $a1, $a0
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: ret
;
; LA64-LABEL: andn_icmp_ne_i8:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: ret
%and = and i8 %a, %b
@@ -105,15 +92,13 @@ define i1 @andn_icmp_ne_i8(i8 signext %a, i8 signext %b) nounwind {
define i1 @andn_icmp_ne_i16(i16 signext %a, i16 signext %b) nounwind {
; LA32-LABEL: andn_icmp_ne_i16:
; LA32: # %bb.0:
-; LA32-NEXT: and $a0, $a0, $a1
-; LA32-NEXT: xor $a0, $a0, $a1
+; LA32-NEXT: andn $a0, $a1, $a0
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: ret
;
; LA64-LABEL: andn_icmp_ne_i16:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: ret
%and = and i16 %a, %b
@@ -124,15 +109,13 @@ define i1 @andn_icmp_ne_i16(i16 signext %a, i16 signext %b) nounwind {
define i1 @andn_icmp_ne_i32(i32 signext %a, i32 signext %b) nounwind {
; LA32-LABEL: andn_icmp_ne_i32:
; LA32: # %bb.0:
-; LA32-NEXT: and $a0, $a0, $a1
-; LA32-NEXT: xor $a0, $a0, $a1
+; LA32-NEXT: andn $a0, $a1, $a0
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: ret
;
; LA64-LABEL: andn_icmp_ne_i32:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: ret
%and = and i32 %a, %b
@@ -151,8 +134,7 @@ define i1 @andn_icmp_ne_i64(i64 %a, i64 %b) nounwind {
;
; LA64-LABEL: andn_icmp_ne_i64:
; LA64: # %bb.0:
-; LA64-NEXT: and $a0, $a0, $a1
-; LA64-NEXT: xor $a0, $a0, $a1
+; LA64-NEXT: andn $a0, $a1, $a0
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: ret
%and = and i64 %a, %b
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