[PATCH] D142178: [X86] Change precision control to FP80 during u64->fp32 conversion on Windows.
icedrocket via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 2 22:14:55 PST 2023
icedrocket added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:22045
+ // Windows needs the precision control changed to 80bits around this add.
+ if (Subtarget.isOSWindows() && DstVT == MVT::f32)
+ Opc = X86ISD::FP80_ADD;
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Should we only apply this to the conversion to f32? Conversion to f64 might also have precision issues though I can't prove it.
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Comment at: llvm/test/CodeGen/X86/uint64-to-float.ll:64
+; X86-WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-WIN-NEXT: fadds __real at 5f80000000000000(,%eax,4)
+; X86-WIN-NEXT: fldcw {{[0-9]+}}(%esp)
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craig.topper wrote:
> icedrocket wrote:
> > craig.topper wrote:
> > > icedrocket wrote:
> > > > I checked the assembly generated by clang and it seems that fadds is split into fld and fadd.
> > > That's weird. Do you have a C file you can share?
> > The file is same as the summary's code in D141074. I think that there is no actual `fadds` instruction in x87 and end up split into two instructions.
> Did you check the assembly without optimizations enabled? Folding the load into the fadd is only done with optimizations enabled.
You're right. I tested again with another code and it works as you mentioned.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142178/new/
https://reviews.llvm.org/D142178
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