[PATCH] D143115: [lld][RISCV] Introduce handling for R_RISCV_PLT32 relocation

[Leonard Chan via Phabricator via llvm-commits]

leonardchan added a comment.

Split the patches in two: D143226 <https://reviews.llvm.org/D143226> has the llvm parts



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Comment at: lld/test/ELF/riscv-undefined-weak.s:89
+.word target at plt - .
+# RELOC:      0xC R_RISCV_PLT32 target 0x0
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jrtc27 wrote:
> MaskRay wrote:
> > Place the CHECK line above the instruction (the style used in this test file).
> This also needs a HEX, otherwise you're not testing the linker at all here.
Uhh. Added one, but checking the actual hex dynamically is a bit difficult in lit. I can get individual addresses from objdump then do arithmetic in lit, but don't know a way to flip the result to match the endianness of objdump's output, so I hope the comments in the updated patch explain well enough.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143115/new/

https://reviews.llvm.org/D143115