[PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td:58
+let Predicates = [HasStdExtZfa] in {
+def FMINM_S: FPALU_rr<0b0010100, 0b010, "fminm.s", FPR32, /*Commutable*/ 1>;
+def FMAXM_S: FPALU_rr<0b0010100, 0b011, "fmaxm.s", FPR32, /*Commutable*/ 1>;
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reames wrote:
> This is a purely optional comment.
> 
> You have the instructions grouped by data type.  It would make the definitions easier to follow if you instead grouped by instruction name.  This would involve slightly more predicate scopes, but would more directly match the wording in the specification.
I've been wondering if it makes sense to have this file at all or should we fold the instructions into the Zfh, F, and D files?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141984/new/

https://reviews.llvm.org/D141984