[PATCH] D143100: [AArch64][GlobalISel] Widen G_ADD/G_MUL/G_OR/... element types if size < 8b

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir:317
+...
+---
+name:            add_v4s1
----------------
Adding 3-vector cases always finds something broken, probably should add those for each of these


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143100/new/

https://reviews.llvm.org/D143100