[PATCH] D142178: [X86] Change precision control to FP80 during u64->fp32 conversion on Windows.

icedrocket via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 2 10:05:18 PST 2023


icedrocket added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.h:896-897
+    /// value in memory of operand 1. If condition of operand 4 is met, add
+    /// value
     /// operand 3 to m32 and write new value in operand 1. Operand 2 is
     /// always updated with the original value from operand 1.
----------------
pengfei wrote:
> This should be in the same line.
Is this comment change intended? Other than this, everything looks good.


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Comment at: llvm/test/CodeGen/X86/uint64-to-float.ll:64
+; X86-WIN-NEXT:    fldcw {{[0-9]+}}(%esp)
+; X86-WIN-NEXT:    fadds __real at 5f80000000000000(,%eax,4)
+; X86-WIN-NEXT:    fldcw {{[0-9]+}}(%esp)
----------------
I checked the assembly generated by clang and it seems that fadds is split into fld and fadd.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142178/new/

https://reviews.llvm.org/D142178



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