[PATCH] D143174: [AMDGPU] Make offset a 32-bit operand

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/DSInstructions.td:1127
   bit gds=0> : GCNPat <
-  (vt (frag (DS1Addr1Offset i32:$ptr, i16:$offset), vt:$value)),
+  (vt (frag (DS1Addr1Offset i32:$ptr, i32:$offset), vt:$value)),
   (inst $ptr, getVregSrcForVT<vt>.ret:$value, offset:$offset, (i1 gds))> {
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piotr wrote:
> foad wrote:
> > What prevents a pattern like this from matching an offset that is too large for the DS instruction's 16-bit offset field?
> Looks like `SelectDS1Addr1Offset` checks if DS offset is legal.
Nothing really stopped that before either. I’m not really sure what the point of these operand types is really, they all end up as int64_ts in the MachineOperand anyway 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143174/new/

https://reviews.llvm.org/D143174