[PATCH] D143174: [AMDGPU] Make offset a 32-bit operand

Piotr Sobczak via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 2 06:03:58 PST 2023


piotr added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/DSInstructions.td:1127
   bit gds=0> : GCNPat <
-  (vt (frag (DS1Addr1Offset i32:$ptr, i16:$offset), vt:$value)),
+  (vt (frag (DS1Addr1Offset i32:$ptr, i32:$offset), vt:$value)),
   (inst $ptr, getVregSrcForVT<vt>.ret:$value, offset:$offset, (i1 gds))> {
----------------
foad wrote:
> What prevents a pattern like this from matching an offset that is too large for the DS instruction's 16-bit offset field?
Looks like `SelectDS1Addr1Offset` checks if DS offset is legal.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143174/new/

https://reviews.llvm.org/D143174



More information about the llvm-commits mailing list