[PATCH] D143157: [AArch64] Add NZVC Def for TLSDESC_CALLSEQ

[Mirko Müller via Phabricator via llvm-commits]

MuellerMP created this revision.
MuellerMP added reviewers: t.p.northover, dmgreen.
MuellerMP added a project: LLVM.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
MuellerMP requested review of this revision.

The glibc and older musl handlers of tlsdesc_dynamic use a cmp instruction which will clobber NZCV.

See glibc's _dl_tlsdesc_dynamic:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-tlsdesc.S;hb=refs/heads/release/2.37/master

See v1.1.21 Musl's __tlsdesc_dynamic:
https://git.musl-libc.org/cgit/musl/tree/src/ldso/aarch64/tlsdesc.s?h=v1.1.21


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D143157

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/aarch64-tls-flags.ll


Index: llvm/test/CodeGen/AArch64/aarch64-tls-flags.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/aarch64-tls-flags.ll
@@ -0,0 +1,29 @@
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s
+
+ at var = thread_local global i32 zeroinitializer
+ at test = global i32 zeroinitializer
+
+define i32 @test_thread_local() {
+; CHECK-LABEL: test_thread_local:
+
+  %testval = load i32, ptr @test
+  %test = icmp eq ptr @test, null
+  %val = load i32, ptr @var
+  %result = zext i1 %test to i32
+  %result2 = add i32 %val, %result
+  ret i32 %result2
+
+; CHECK: str x[[SPILL:[0-9]+]], [sp, #-16]
+; CHECK: adrp x[[TEST:[0-9]+]], :got:test
+; CHECK: ldr x[[TEST]], [x[[TEST]], :got_lo12:test]
+; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:var
+; CHECK-NEXT: ldr x[[CALLEE:[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:var]
+; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:var
+; CHECK-NEXT: .tlsdesccall var
+; CHECK-NEXT: blr x[[CALLEE]]
+
+; CHECK-NEXT: mrs x[[TP:[0-9]+]], TPIDR_EL0
+; CHECK-NEXT: ldr w[[TP]], [x[[TP]], x0]
+; CHECK-NEXT: cmp x[[IN:[0-9]+]], #0
+
+}
Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -2612,7 +2612,7 @@
 // FIXME: maybe the scratch register used shouldn't be fixed to X1?
 // FIXME: can "hasSideEffects be dropped?
 // This gets lowered to an instruction sequence which takes 16 bytes
-let isCall = 1, Defs = [LR, X0, X1], hasSideEffects = 1, Size = 16,
+let isCall = 1, Defs = [NZVC, LR, X0, X1], hasSideEffects = 1, Size = 16,
     isCodeGenOnly = 1 in
 def TLSDESC_CALLSEQ
     : Pseudo<(outs), (ins i64imm:$sym),


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