[llvm] fef7eed - [PowerPC] Use default attributes for more intrinsics

Qiu Chaofan via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 1 22:01:10 PST 2023


Author: Qiu Chaofan
Date: 2023-02-02T14:00:55+08:00
New Revision: fef7eedc3ef8610fe8373ee3e739b7e052070a5c

URL: https://github.com/llvm/llvm-project/commit/fef7eedc3ef8610fe8373ee3e739b7e052070a5c
DIFF: https://github.com/llvm/llvm-project/commit/fef7eedc3ef8610fe8373ee3e739b7e052070a5c.diff

LOG: [PowerPC] Use default attributes for more intrinsics

Reviewed By: shchenz, amyk

Differential Revision: https://reviews.llvm.org/D141566

Added: 
    

Modified: 
    llvm/include/llvm/IR/IntrinsicsPowerPC.td

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 4e95b77a0d7cf..58822059b9ac2 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -31,12 +31,12 @@ let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
 
   // Get content from current FPSCR register
   def int_ppc_readflm : ClangBuiltin<"__builtin_readflm">,
-                        Intrinsic<[llvm_double_ty], [],
-                                  [IntrNoMerge, IntrHasSideEffects]>;
+                        DefaultAttrsIntrinsic<[llvm_double_ty], [],
+                                              [IntrNoMerge, IntrHasSideEffects]>;
   // Set FPSCR register, and return previous content
   def int_ppc_setflm : ClangBuiltin<"__builtin_setflm">,
-                       Intrinsic<[llvm_double_ty], [llvm_double_ty],
-                                 [IntrHasSideEffects]>;
+                       DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty],
+                                             [IntrHasSideEffects]>;
 
   // Intrinsics for [double]word extended forms of divide instructions
   def int_ppc_divwe : ClangBuiltin<"__builtin_divwe">,
@@ -61,14 +61,14 @@ let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
 
   // Generate a random number
   def int_ppc_darn : ClangBuiltin<"__builtin_darn">,
-                     Intrinsic<[llvm_i64_ty], [],
-                               [IntrNoMerge, IntrHasSideEffects]>;
+                     DefaultAttrsIntrinsic<[llvm_i64_ty], [],
+                                           [IntrNoMerge, IntrHasSideEffects]>;
   def int_ppc_darnraw : ClangBuiltin<"__builtin_darn_raw">,
-                     Intrinsic<[llvm_i64_ty], [],
-                               [IntrNoMerge, IntrHasSideEffects]>;
+                     DefaultAttrsIntrinsic<[llvm_i64_ty], [],
+                                           [IntrNoMerge, IntrHasSideEffects]>;
   def int_ppc_darn32 : ClangBuiltin<"__builtin_darn_32">,
-                     Intrinsic<[llvm_i32_ty], [],
-                               [IntrNoMerge, IntrHasSideEffects]>;
+                     DefaultAttrsIntrinsic<[llvm_i32_ty], [],
+                                           [IntrNoMerge, IntrHasSideEffects]>;
 
   // Bit permute doubleword
   def int_ppc_bpermd : ClangBuiltin<"__builtin_bpermd">,
@@ -389,20 +389,20 @@ let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
   // Stores.  These don't map directly to GCC builtins because they represent the
   // source address with a single pointer.
   def int_ppc_altivec_stvx :
-              Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
-                        [IntrWriteMem, IntrArgMemOnly]>;
+              DefaultAttrsIntrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
+                                    [IntrWriteMem, IntrArgMemOnly]>;
   def int_ppc_altivec_stvxl :
-              Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
-                        [IntrWriteMem, IntrArgMemOnly]>;
+              DefaultAttrsIntrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
+                                    [IntrWriteMem, IntrArgMemOnly]>;
   def int_ppc_altivec_stvebx :
-              Intrinsic<[], [llvm_v16i8_ty, llvm_ptr_ty],
-                        [IntrWriteMem, IntrArgMemOnly]>;
+              DefaultAttrsIntrinsic<[], [llvm_v16i8_ty, llvm_ptr_ty],
+                                    [IntrWriteMem, IntrArgMemOnly]>;
   def int_ppc_altivec_stvehx :
-              Intrinsic<[], [llvm_v8i16_ty, llvm_ptr_ty],
-                        [IntrWriteMem, IntrArgMemOnly]>;
+              DefaultAttrsIntrinsic<[], [llvm_v8i16_ty, llvm_ptr_ty],
+                                    [IntrWriteMem, IntrArgMemOnly]>;
   def int_ppc_altivec_stvewx :
-              Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
-                        [IntrWriteMem, IntrArgMemOnly]>;
+              DefaultAttrsIntrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
+                                    [IntrWriteMem, IntrArgMemOnly]>;
 
   // Comparisons setting a vector.
   def int_ppc_altivec_vcmpbfp : ClangBuiltin<"__builtin_altivec_vcmpbfp">,
@@ -1572,7 +1572,7 @@ def int_ppc_cfence : Intrinsic<[], [llvm_any_ty], []>;
 
 // PowerPC set FPSCR Intrinsic Definitions.
 def int_ppc_setrnd : ClangBuiltin<"__builtin_setrnd">,
-      Intrinsic<[llvm_double_ty], [llvm_i32_ty], []>;
+      DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_i32_ty], [IntrHasSideEffects]>;
 }
 
 let TargetPrefix = "ppc" in {
@@ -1728,14 +1728,14 @@ let TargetPrefix = "ppc" in {
   def int_ppc_mfmsr : ClangBuiltin<"__builtin_ppc_mfmsr">,
       DefaultAttrsIntrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
   def int_ppc_mfspr
-      : Intrinsic<[llvm_anyint_ty], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
+      : DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
   def int_ppc_mtmsr
       : ClangBuiltin<"__builtin_ppc_mtmsr">, Intrinsic<[], [llvm_i32_ty], []>;
   def int_ppc_mtspr
-      : Intrinsic<[], [llvm_i32_ty, llvm_anyint_ty], [ImmArg<ArgIndex<0>>]>;
+      : DefaultAttrsIntrinsic<[], [llvm_i32_ty, llvm_anyint_ty], [ImmArg<ArgIndex<0>>]>;
   def int_ppc_stfiw : ClangBuiltin<"__builtin_ppc_stfiw">,
-                      Intrinsic<[], [llvm_ptr_ty, llvm_double_ty],
-                                [IntrWriteMem]>;
+                      DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_double_ty],
+                                            [IntrWriteMem]>;
   // compare
   def int_ppc_cmpeqb
       : ClangBuiltin<"__builtin_ppc_cmpeqb">,
@@ -1865,8 +1865,8 @@ let TargetPrefix = "ppc" in {
         DefaultAttrsIntrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
   def int_ppc_addex
       : ClangBuiltin<"__builtin_ppc_addex">,
-        Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty],
-                  [IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<2>>]>;
+        DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty],
+                              [IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<2>>]>;
   def int_ppc_fsel : ClangBuiltin<"__builtin_ppc_fsel">,
       DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty, llvm_double_ty, 
                              llvm_double_ty], [IntrNoMem]>;
@@ -1893,9 +1893,9 @@ let TargetPrefix = "ppc" in {
       DefaultAttrsIntrinsic<[llvm_i32_ty], 
                             [llvm_double_ty, llvm_double_ty],
                             [IntrNoMem]>;
-  def int_ppc_test_data_class : Intrinsic<[llvm_i32_ty],
-                                          [llvm_anyfloat_ty, llvm_i32_ty],
-                                          [IntrNoMem, ImmArg<ArgIndex<1>>]>;
+  def int_ppc_test_data_class
+      : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_anyfloat_ty, llvm_i32_ty],
+                              [IntrNoMem, ImmArg<ArgIndex<1>>]>;
   def int_ppc_fnabs
       : ClangBuiltin<"__builtin_ppc_fnabs">,
         DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;


        


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