[PATCH] D141863: [llvm][APFloat] Add NaN-in-negative-zero formats by AMD and GraphCore

[Chris Lattner via Phabricator via llvm-commits]

lattner added inline comments.


================
Comment at: llvm/include/llvm/ADT/APFloat.h:161
     S_Float8E5M2,
+    // 8-bit floating point number mostly follwing IEEE-754 conventions
+    // and bit layout S1E5M2 described in https://arxiv.org/abs/2206.02915,
----------------
Typo follwing


================
Comment at: llvm/include/llvm/ADT/APFloat.h:171
     S_Float8E4M3FN,
+    // 8-bit floating point number mostly follwing IEEE-754 conventions
+    // and bit layout S1E4M3 described in https://arxiv.org/abs/2206.02915,
----------------
Typo follwing


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141863/new/

https://reviews.llvm.org/D141863