[PATCH] D141129: [InstCombine] Use KnownBits for lshr/add -> (a + b < a)

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh updated this revision to Diff 493882.
Pierre-vh marked 2 inline comments as done.
Pierre-vh added a comment.

- Only allow == ShAmt
- Add tests with 16/17 + 32/33 leading zeroes


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141129/new/

https://reviews.llvm.org/D141129

Files:
  llvm/include/llvm/Analysis/ValueTracking.h
  llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
  llvm/lib/Analysis/ValueTracking.cpp
  llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
  llvm/test/Transforms/InstCombine/shift-add.ll

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