[PATCH] D143001: [AArch64] Mark function calls as possibly changing FPCR
Serge Pavlov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 31 21:07:44 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc4e38fadfa2a: [AArch64] Mark function calls as possibly changing FPCR (authored by sepavloff).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143001/new/
https://reviews.llvm.org/D143001
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/test/CodeGen/AArch64/strict-fp-func.ll
Index: llvm/test/CodeGen/AArch64/strict-fp-func.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/strict-fp-func.ll
@@ -0,0 +1,13 @@
+; RUN: llc -mtriple aarch64-none-linux-gnu -stop-after=finalize-isel %s -o - | FileCheck %s
+
+define float @func_02(float %x, float %y) strictfp nounwind {
+ %call = call float @func_01(float %x) strictfp
+ %res = call float @llvm.experimental.constrained.fadd.f32(float %call, float %y, metadata !"round.dynamic", metadata !"fpexcept.ignore") strictfp
+ ret float %res
+}
+; CHECK-LABEL: name: func_02
+; CHECK: BL @func_01, {{.*}}, implicit-def $fpcr
+
+
+declare float @func_01(float)
+declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.h
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -670,6 +670,7 @@
CodeGenOpt::Level OptLevel) const override;
const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const override;
+ const MCPhysReg *getRoundingControlRegisters() const override;
/// Returns false if N is a bit extraction pattern of (X >> C) & Mask.
bool isDesirableToCommuteWithShift(const SDNode *N,
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -14946,6 +14946,11 @@
return ScratchRegs;
}
+const MCPhysReg *AArch64TargetLowering::getRoundingControlRegisters() const {
+ static const MCPhysReg RCRegs[] = {AArch64::FPCR, 0};
+ return RCRegs;
+}
+
bool
AArch64TargetLowering::isDesirableToCommuteWithShift(const SDNode *N,
CombineLevel Level) const {
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