[PATCH] D143016: [InstCombine] Promote expression tree with @llvm.vscale when zero-extending result.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 31 14:05:03 PST 2023
sdesmalen created this revision.
sdesmalen added reviewers: goldstein.w.n, nikic, MattDevereau.
Herald added subscribers: StephenFan, hiraditya.
Herald added a project: All.
sdesmalen requested review of this revision.
Herald added subscribers: llvm-commits, alextsao1999.
Herald added a project: LLVM.
The LoopVectorizer emits the (scaled) element count as i32, which for
scalable VFs results in calls to @llvm.vscale.i32(). This value is scaled
and further zero-extended to i64.
The zero-extend can be folded away by executing the whole expression in i64
type using @llvm.vscale.i64(). Any logical `and` that would needed to mask
the result can be further folded away by KnownBits analysis when
vscale_range is set.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D143016
Files:
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
llvm/test/Transforms/InstCombine/AArch64/vscale.ll
Index: llvm/test/Transforms/InstCombine/AArch64/vscale.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/InstCombine/AArch64/vscale.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes='instcombine' -S < %s | FileCheck %s
+target triple = "aarch64"
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+
+define i64 @free_zext_vscale_i32_to_i64() #0 {
+; CHECK-LABEL: @free_zext_vscale_i32_to_i64(
+; CHECK-NEXT: [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: ret i64 [[VSCALE]]
+;
+ %vscale = call i32 @llvm.vscale.i32()
+ %ext = zext i32 %vscale to i64
+ ret i64 %ext
+}
+
+define i64 @free_zext_vscale_shl_i32_to_i64() #0 {
+; CHECK-LABEL: @free_zext_vscale_shl_i32_to_i64(
+; CHECK-NEXT: [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i64 [[VSCALE]], 3
+; CHECK-NEXT: ret i64 [[SHL]]
+;
+ %vscale = call i32 @llvm.vscale.i32()
+ %shl = shl i32 %vscale, 3
+ %ext = zext i32 %shl to i64
+ ret i64 %ext
+}
+
+declare i32 @llvm.vscale.i32()
+
+attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
Index: llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -252,6 +252,16 @@
Res = CastInst::Create(
static_cast<Instruction::CastOps>(Opc), I->getOperand(0), Ty);
break;
+ case Instruction::Call:
+ if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
+ if (II->getIntrinsicID() == Intrinsic::vscale) {
+ Function *Fn =
+ Intrinsic::getDeclaration(I->getModule(), Intrinsic::vscale, {Ty});
+ Res = CallInst::Create(Fn->getFunctionType(), Fn);
+ break;
+ }
+ }
+ LLVM_FALLTHROUGH;
default:
// TODO: Can handle more cases here.
llvm_unreachable("Unreachable!");
@@ -1217,6 +1227,13 @@
return false;
return true;
}
+ case Instruction::Call:
+ // llvm.vscale() can always be executed in larger type, because the
+ // value is automatically zero-extended.
+ if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I))
+ if (II->getIntrinsicID() == Intrinsic::vscale)
+ return true;
+ return false;
default:
// TODO: Can handle more cases here.
return false;
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