[PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 31 13:57:42 PST 2023
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Forked from D142901 <https://reviews.llvm.org/D142901> to handle the `mul` case and `shl` case when
`Y`/`Z` are non-constant + deduce more `nsw`/`nuw` flag for the output
`mul`.
We can handle the following cases + some `nsw`/`nuw` flags:
`(srem (mul/shl X, Y), (mul/shl X, Z))`
[If `srem(Y, Z) == 0`]
-> 0
- https://alive2.llvm.org/ce/z/PW4XZ-
[If `srem(Y, Z) == Y`]
-> `(mul/shl nuw nsw X, Y)`
- https://alive2.llvm.org/ce/z/DQe9Ek
-> `(mul/shl nsw X, Y)`
- https://alive2.llvm.org/ce/z/Nr_MdH
[If `Y`/`Z` are constant or `mul` and `Y`/`Z` are one use]
-> `(mul/shl nuw nsw X, (srem Y, Z))`
- https://alive2.llvm.org/ce/z/ccTFj2
- https://alive2.llvm.org/ce/z/i_UQ5A
-> `(mul/shl nsw X, (srem Y, Z))`
- https://alive2.llvm.org/ce/z/mQKc63
- https://alive2.llvm.org/ce/z/uERkKH
`(urem (mul/shl X, Y), (mul/shl X, Z))`
[If `urem(Y, Z) == 0`]
-> 0
- https://alive2.llvm.org/ce/z/LL7UVR
[If `srem(Y, Z) == Y`]
-> `(mul/shl nuw nsw X, Y)`
- https://alive2.llvm.org/ce/z/9Kgs_i
-> `(mul/shl nuw X, Y)`
- https://alive2.llvm.org/ce/z/ow9i8u
[If `Y`/`Z` are one use]
-> `(mul/shl nuw nsw X, (srem Y, Z))`
- https://alive2.llvm.org/ce/z/mNnQqJ
- https://alive2.llvm.org/ce/z/Bj_DR-
- https://alive2.llvm.org/ce/z/X6ZEtQ
-> `(mul/shl nuw X, (srem Y, Z))`
- https://alive2.llvm.org/ce/z/SJYtUV
The rationale for doing this all in `InstCombine` rather than handling
the constant `mul` cases in `InstSimplify` is we often create a new
instruction because we are able to deduce more `nsw`/`nuw` flags than
the original instruction had. As well there is a fair amount of
overlap between the constant and non-constant cases.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D143014
Files:
llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/test/Transforms/InstCombine/urem-mul.ll
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