[llvm] 20d454c - [gn] prepare for 40025761564 (awkward AMDGPUGenRegisterBank.inc include)

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2023-01-31T15:34:27-05:00
New Revision: 20d454c79bbca7822eee88d188afb7a8747dac58

URL: https://github.com/llvm/llvm-project/commit/20d454c79bbca7822eee88d188afb7a8747dac58
DIFF: https://github.com/llvm/llvm-project/commit/20d454c79bbca7822eee88d188afb7a8747dac58.diff

LOG: [gn] prepare for 40025761564 (awkward AMDGPUGenRegisterBank.inc include)

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
    llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Utils/BUILD.gn
    llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn

Removed: 
    


################################################################################
diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
index 717e61da9f5b2..e4815ccc8726d 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
@@ -58,7 +58,11 @@ tablegen("AMDGPUGenMCPseudoLowering") {
 }
 
 tablegen("AMDGPUGenRegisterBank") {
-  visibility = [ ":LLVMAMDGPUCodeGen" ]
+  visibility = [
+    ":LLVMAMDGPUCodeGen",
+    "Utils",
+    "//llvm/unittests/Target/AMDGPU:AMDGPUTests",
+  ]
   args = [ "-gen-register-bank" ]
   td_file = "AMDGPU.td"
 }

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Utils/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Utils/BUILD.gn
index 0edfb769cd95d..9ff4776c95a9f 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Utils/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Utils/BUILD.gn
@@ -10,6 +10,9 @@ static_library("Utils") {
   output_name = "LLVMAMDGPUUtils"
   public_deps = [ ":AMDGPUGenSearchableTables" ]
   deps = [
+    # AMDGPUBaseInfo.cpp includes GCNSubtarget.h which after 490e348e679
+    # includes the generated AMDGPUGenRegisterBank.inc file :/
+    "../:AMDGPUGenRegisterBank",
     "//llvm/lib/BinaryFormat",
     "//llvm/lib/IR",
     "//llvm/lib/MC",

diff  --git a/llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn b/llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
index 3537aaab0ef0a..75ecb26f4c7e1 100644
--- a/llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
@@ -4,6 +4,10 @@ unittest("AMDGPUTests") {
   deps = [
     "//llvm/lib/Support",
     "//llvm/lib/Target",
+
+    # AMDGPUBaseInfo.cpp includes GCNSubtarget.h which after 490e348e679
+    # includes the generated AMDGPUGenRegisterBank.inc file :/
+    "//llvm/lib/Target/AMDGPU/:AMDGPUGenRegisterBank",
     "//llvm/lib/Target/AMDGPU:LLVMAMDGPUCodeGen",
     "//llvm/lib/Target/AMDGPU/MCTargetDesc",
     "//llvm/lib/Target/AMDGPU/TargetInfo",