[PATCH] D142997: [RISCV] Move the even register check for rv32zdinx later in the matching process.

[Craig Topper via Phabricator via llvm-commits]

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And remove the IsRV64 checks for isGPRAsFPR and isGPRPF64AsFPR.

Overall I think this results in a better diagnostic experience. We
now do a better job of matching Zdinx instructions even if the registers
aren't correct and report an error for missing features like RV64.

Unfortunately, this makes it difficult to recover the error location
for the invalid odd register when we do report it. But to make up
for it, I gave a more specific error message.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D142997

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/test/MC/RISCV/rv32zdinx-invalid.s
  llvm/test/MC/RISCV/rv32zfinx-invalid.s
  llvm/test/MC/RISCV/rv64zdinx-valid.s

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