[PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


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Comment at: llvm/lib/Analysis/InstructionSimplify.cpp:3264
+      !match(RHS, m_Shl(m_Deferred(V), m_APInt(ShiftAmountR))) ||
+      LHS->getType() != RHS->getType() || !isKnownNonZero(V, Q.DL))
+    return nullptr;
----------------
I don't think the types can differ.


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Comment at: llvm/lib/Analysis/InstructionSimplify.cpp:3273
+  if (ICmpInst::isSigned(Predicate) &&
+      (!LargestShift->hasNoUnsignedWrap() || !LargestShift->hasNoSignedWrap()))
+    return nullptr;
----------------
These checks should go through Q.IIQ.


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Comment at: llvm/lib/Analysis/InstructionSimplify.cpp:3281
+    return getTrue(getCompareTy(LHS));
+  return getFalse(getCompareTy(RHS));
+}
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I believe we could `return simplifyICmpInst(Pred, ShiftAmountL, ShiftAmountR, Q, MaxRecurse -1)` here, without the limitation to constant shift amounts. The only disadvantage to that would be that we would have to require the nuw/nsw flags on both shifts, rather than only on the largest one (as we wouldn't know which one is the largest is without further effort).

This would allow handling comparisons between `shl %v, %s` and `%shl %v, (add nuw %s, 1)` or similar.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142542/new/

https://reviews.llvm.org/D142542