[PATCH] D142971: [SystemZ] Implement isGuaranteedNotToBeUndefOrPoisonForTargetNode()

[Jonas Paulsson via Phabricator via llvm-commits]

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Returning true from this method for PCREL_WRAPPER and PCREL_OFFSET avoids problems when a PCREL_OFFSET node ends up with a freeze operand, which is not handled or expected by the backend.

Fixes #60107

There are probably other SystemZISD nodes that could go in here, but I am not quite sure how this is supposed to work: It seems to me that some kind of undef/poison value is recognized and at some point a freeze instruction is inserted in the IR. Then the DAGCombiner optimizes it away because there is a target node that now says that it is never undef..? This is contradictory but probably still worthwhile somehow, but I can't quite figure out how..?


https://reviews.llvm.org/D142971

Files:
  llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
  llvm/lib/Target/SystemZ/SystemZISelLowering.h
  llvm/test/CodeGen/SystemZ/freeze.ll


Index: llvm/test/CodeGen/SystemZ/freeze.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/SystemZ/freeze.ll
@@ -0,0 +1,28 @@
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=zEC12 < %s  | FileCheck %s
+;
+; Check that DAGCombiner doesn't cause a crash by eventually producing a
+; PCREL_OFFSET node with a freeze operand.
+
+ at a = dso_local global [6 x [6 x [3 x i8]]] zeroinitializer, align 2
+ at b = dso_local local_unnamed_addr global i32 0, align 4
+
+define void @fun(i8 noundef zeroext %g) {
+; CHECK-LABEL: fun
+entry:
+  %agg.tmp.ensured.sroa.0 = alloca i8, align 2
+  %conv = zext i8 %g to i64
+  %0 = inttoptr i64 %conv to ptr
+  %.fr = freeze ptr getelementptr inbounds ([6 x [6 x [3 x i8]]], ptr @a, i64 0, i64 1, i64 2, i64 1)
+  %cmp = icmp eq ptr %.fr, %0
+  %1 = load i8, ptr getelementptr inbounds ([6 x [6 x [3 x i8]]], ptr @a, i64 0, i64 5, i64 4, i64 2), align 2
+  %conv2 = zext i8 %1 to i32
+  br i1 %cmp, label %for.cond.us, label %for.cond
+
+for.cond.us:                                      ; preds = %entry, %for.cond.us
+  store i32 %conv2, ptr @b, align 4
+  ret void
+
+for.cond:                                         ; preds = %entry, %for.cond
+  store i32 0, ptr @b, align 4
+  ret void
+}
Index: llvm/lib/Target/SystemZ/SystemZISelLowering.h
===================================================================
--- llvm/lib/Target/SystemZ/SystemZISelLowering.h
+++ llvm/lib/Target/SystemZ/SystemZISelLowering.h
@@ -600,6 +600,10 @@
                                            const SelectionDAG &DAG,
                                            unsigned Depth) const override;
 
+  bool isGuaranteedNotToBeUndefOrPoisonForTargetNode(
+      SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
+      bool PoisonOnly, unsigned Depth) const override;
+
   ISD::NodeType getExtendForAtomicOps() const override {
     return ISD::ANY_EXTEND;
   }
Index: llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
===================================================================
--- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -7443,6 +7443,18 @@
   return 1;
 }
 
+bool SystemZTargetLowering::
+isGuaranteedNotToBeUndefOrPoisonForTargetNode(SDValue Op,
+         const APInt &DemandedElts, const SelectionDAG &DAG,
+         bool PoisonOnly, unsigned Depth) const {
+  switch (Op->getOpcode()) {
+  case SystemZISD::PCREL_WRAPPER:
+  case SystemZISD::PCREL_OFFSET:
+    return true;
+  }
+  return false;
+}
+
 unsigned
 SystemZTargetLowering::getStackProbeSize(const MachineFunction &MF) const {
   const TargetFrameLowering *TFI = Subtarget.getFrameLowering();


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