[PATCH] D142746: AMDGPU: Fold fneg into bitcast of build_vector

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:576-588
+    return true;
+  case ISD::BITCAST:
+    llvm_unreachable("bitcast is special cased");
   case AMDGPUISD::RCP:
   case AMDGPUISD::RCP_LEGACY:
   case AMDGPUISD::RCP_IFLAG:
   case AMDGPUISD::SIN_HW:
----------------



================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:4133
+    SDValue BCSrc = N0.getOperand(0);
+    if (BCSrc.getOpcode() == ISD::BUILD_VECTOR) {
+      SDValue HighBits = BCSrc.getOperand(BCSrc.getNumOperands() - 1);
----------------
Do a early return instead to reduce indentation?


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:4139-4153
+      SDValue CastHi = DAG.getNode(ISD::BITCAST, SL, MVT::f32, HighBits);
+      SDValue NegHi = DAG.getNode(ISD::FNEG, SL, MVT::f32, CastHi);
+      SDValue CastBack =
+          DAG.getNode(ISD::BITCAST, SL, HighBits.getValueType(), NegHi);
+
+      SmallVector<SDValue, 8> Ops(BCSrc->op_begin(), BCSrc->op_end());
+      Ops.back() = CastBack;
----------------
Can you add a comment to show what this is doing? (`A -> B` style comment like we usually do for DAG combines)



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  https://reviews.llvm.org/D142746/new/

https://reviews.llvm.org/D142746