[llvm] 17ce615 - AMDGPU: Fix null dereference in getInstructionUniformity

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2023-01-30T15:47:17-04:00
New Revision: 17ce615c781f854b6247ea4995bd50f967d1b699

URL: https://github.com/llvm/llvm-project/commit/17ce615c781f854b6247ea4995bd50f967d1b699
DIFF: https://github.com/llvm/llvm-project/commit/17ce615c781f854b6247ea4995bd50f967d1b699.diff

LOG: AMDGPU: Fix null dereference in getInstructionUniformity

This was failing when it couldn't find an allocatable class
for special physical register inputs (like $mode), which are all
scalars.

This avoids numerous test failures when regbankselect is updated
to use uniformity analysis.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index e508d206f6c51..7dfcca63542c0 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -8464,6 +8464,11 @@ SIInstrInfo::getInstructionUniformity(const MachineInstr &MI) const {
   for (auto srcOp : MI.operands()) {
     if (srcOp.isReg() && srcOp.getReg().isPhysical()) {
       const TargetRegisterClass *regClass = RI.getPhysRegBaseClass(srcOp.getReg());
+
+      // If the class is missing it's an unallocatable scalar of some kind.
+      if (!regClass)
+        continue;
+
       if (RI.isVGPRClass(regClass))
         return InstructionUniformity::NeverUniform;
     }