[llvm] 025c920 - [RISCV] Replace multiple ifs with a switch. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-01-30T09:53:48-08:00
New Revision: 025c92077d39c3da9db68d13cc1763a7ed22a522

URL: https://github.com/llvm/llvm-project/commit/025c92077d39c3da9db68d13cc1763a7ed22a522
DIFF: https://github.com/llvm/llvm-project/commit/025c92077d39c3da9db68d13cc1763a7ed22a522.diff

LOG: [RISCV] Replace multiple ifs with a switch. NFC

D108961 will add more instructions to this.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
index a335b2d23394f..9f5561bfd2aee 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
@@ -189,16 +189,17 @@ void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
   // RISCVInstrInfo::getInstSizeInBytes expects that the total size of the
   // expanded instructions for each pseudo is correct in the Size field of the
   // tablegen definition for the pseudo.
-  if (MI.getOpcode() == RISCV::PseudoCALLReg ||
-      MI.getOpcode() == RISCV::PseudoCALL ||
-      MI.getOpcode() == RISCV::PseudoTAIL ||
-      MI.getOpcode() == RISCV::PseudoJump) {
+  switch (MI.getOpcode()) {
+  default:
+    break;
+  case RISCV::PseudoCALLReg:
+  case RISCV::PseudoCALL:
+  case RISCV::PseudoTAIL:
+  case RISCV::PseudoJump:
     expandFunctionCall(MI, OS, Fixups, STI);
     MCNumEmitted += 2;
     return;
-  }
-
-  if (MI.getOpcode() == RISCV::PseudoAddTPRel) {
+  case RISCV::PseudoAddTPRel:
     expandAddTPRel(MI, OS, Fixups, STI);
     MCNumEmitted += 1;
     return;