[PATCH] D139182: AArch64: add CodeGen support for FEAT_XS DSB instructions

[Sam Elliott via Phabricator via llvm-commits]

lenary added a comment.

I'm not sure I agree with "map naturally", when `CRm` is a 4-bit field, and both bit 7 and bit 5 are different in the `dsb <option>` vs `dsb <option>nXS` instructions.

Are you willing to put this through review for the ACLE <https://github.com/ARM-software/acle/blob/main/main/acle.md>? `__builtin_arm_dsb` is the implementation of `__dsb`, so I worry that this would make this intrinsic non-portable for clang vs gcc.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139182/new/

https://reviews.llvm.org/D139182