[llvm] bc4326d - [X86] pr53419.ll - add AVX512 test coverage

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-01-30T09:32:50Z
New Revision: bc4326d11a768462d13eb199bba101d1b2a6c18e

URL: https://github.com/llvm/llvm-project/commit/bc4326d11a768462d13eb199bba101d1b2a6c18e
DIFF: https://github.com/llvm/llvm-project/commit/bc4326d11a768462d13eb199bba101d1b2a6c18e.diff

LOG: [X86] pr53419.ll - add AVX512 test coverage

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/pr53419.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/pr53419.ll b/llvm/test/CodeGen/X86/pr53419.ll
index 92203f61eae81..aa22c247a3b76 100644
--- a/llvm/test/CodeGen/X86/pr53419.ll
+++ b/llvm/test/CodeGen/X86/pr53419.ll
@@ -1,9 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2   | FileCheck %s --check-prefixes=X64,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=X64,SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx    | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2   | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=i686-unknown   -mattr=+avx2   | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2     | FileCheck %s --check-prefixes=X64,SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2   | FileCheck %s --check-prefixes=X64,SSE,SSE42
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx      | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2     | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=X64,AVX512
+; RUN: llc < %s -mtriple=i686-unknown   -mattr=+avx2     | FileCheck %s --check-prefixes=X86
 
 declare i1 @llvm.vector.reduce.and.v4i1(<4 x i1>)
 declare i1 @llvm.vector.reduce.and.v8i1(<8 x i1>)
@@ -41,6 +42,17 @@ define i1 @intrinsic_v4i8(ptr align 1 %arg, ptr align 1 %arg1) {
 ; AVX-NEXT:    sete %al
 ; AVX-NEXT:    retq
 ;
+; AVX512-LABEL: intrinsic_v4i8:
+; AVX512:       # %bb.0: # %bb
+; AVX512-NEXT:    vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX512-NEXT:    vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX512-NEXT:    vpcmpeqb %xmm1, %xmm0, %k0
+; AVX512-NEXT:    knotw %k0, %k0
+; AVX512-NEXT:    kmovd %k0, %eax
+; AVX512-NEXT:    testb $15, %al
+; AVX512-NEXT:    sete %al
+; AVX512-NEXT:    retq
+;
 ; X86-LABEL: intrinsic_v4i8:
 ; X86:       # %bb.0: # %bb
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -80,6 +92,15 @@ define i1 @intrinsic_v8i8(ptr align 1 %arg, ptr align 1 %arg1) {
 ; AVX-NEXT:    sete %al
 ; AVX-NEXT:    retq
 ;
+; AVX512-LABEL: intrinsic_v8i8:
+; AVX512:       # %bb.0: # %bb
+; AVX512-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
+; AVX512-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
+; AVX512-NEXT:    vpcmpeqb %xmm1, %xmm0, %k0
+; AVX512-NEXT:    kortestb %k0, %k0
+; AVX512-NEXT:    setb %al
+; AVX512-NEXT:    retq
+;
 ; X86-LABEL: intrinsic_v8i8:
 ; X86:       # %bb.0: # %bb
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -132,6 +153,16 @@ define i1 @vector_version(ptr align 1 %arg, ptr align 1 %arg1) {
 ; AVX-NEXT:    sete %al
 ; AVX-NEXT:    retq
 ;
+; AVX512-LABEL: vector_version:
+; AVX512:       # %bb.0: # %bb
+; AVX512-NEXT:    vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX512-NEXT:    vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX512-NEXT:    vpcmpneqb %xmm1, %xmm0, %k0
+; AVX512-NEXT:    kmovd %k0, %eax
+; AVX512-NEXT:    testb $15, %al
+; AVX512-NEXT:    sete %al
+; AVX512-NEXT:    retq
+;
 ; X86-LABEL: vector_version:
 ; X86:       # %bb.0: # %bb
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax