[PATCH] D142485: [AArch64][SME2] Add multi-vector min/max intrinsics

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll:5
+
+define { <vscale x 16 x i8>, <vscale x 16 x i8> } @multi_vec_max_single_x2_s8(<vscale x 16 x i8> %zdn1, <vscale x 16 x i8> %zdn2, <vscale x 16 x i8> %zm) {
+; CHECK-LABEL: multi_vec_max_single_x2_s8:
----------------
HI @kmclaughlin, I don't suppose you could add a dummy unused operand for these tests similar to D142732?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142485/new/

https://reviews.llvm.org/D142485