[PATCH] D140952: Teach the AArch64 backend to materialize immediates using a pair of ORR-immediateinstructions.

[Owen Anderson via Phabricator via llvm-commits]

resistor added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ExpandImm.cpp:345
+
+// Attempt to expand an immediate as a pair of ANDs of logical immediates.
+static bool tryAndOfLogicalImmediates(uint64_t UImm,
----------------
dmgreen wrote:
> "as an AND of an OR"? or a maybe explain the inverse of the immediate thing. I can see why this would work, but find it difficult to follow - it would be good to add a longer comment explaining how it works.
The `ORR` is a red herring. The initial `ORR` is just a move-immediate, which the following `AND` then uses as its LHS.


================
Comment at: llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp:169
+    case AArch64::ANDXri:
+      if (I->Op1 == 0) {
+        MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
----------------
dmgreen wrote:
> Can this happen?
I'm not aware that anything creates it today, but I thought it was better to have the API of be orthogonal, so as to minimize surprise for any future folks touching this area.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140952/new/

https://reviews.llvm.org/D140952