[llvm] f4fbcd6 - [PowerPC] Convert more tests to opaque pointers (NFC)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 29 17:27:57 PST 2023


Author: Sergei Barannikov
Date: 2023-01-30T04:27:10+03:00
New Revision: f4fbcd62af31ac8921c2c2216bdbed1b49a0dff1

URL: https://github.com/llvm/llvm-project/commit/f4fbcd62af31ac8921c2c2216bdbed1b49a0dff1
DIFF: https://github.com/llvm/llvm-project/commit/f4fbcd62af31ac8921c2c2216bdbed1b49a0dff1.diff

LOG: [PowerPC] Convert more tests to opaque pointers (NFC)

* Add -fast-isel=false to func-alias.ll. The test was added as a
SelectionDAG test. Without this option, FastISel successfully selects
the call that had a ConstantExpr argument.
* fast-isel-branch.ll couldn't be handled by FastISel. Now it can,
hence the change in the stack offsets.

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
    llvm/test/CodeGen/PowerPC/fast-isel-branch.ll
    llvm/test/CodeGen/PowerPC/func-alias.ll
    llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll
    llvm/test/CodeGen/PowerPC/memcmpIR.ll
    llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
    llvm/test/CodeGen/PowerPC/ppc64-gep-opt.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
index f07f673f3c899..ccf89aac2d540 100644
--- a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
@@ -1,37 +1,35 @@
-; RUN: llc -opaque-pointers=0 -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
+; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
 ; RUN: FileCheck --check-prefix=64BIT %s
 
-; RUN: llc -opaque-pointers=0 -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
+; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
 ; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | \
 ; RUN: FileCheck --check-prefix=ASM64 %s
 
   define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr  {
   entry:
-    %arg1 = alloca i8*, align 8
-    %arg2 = alloca i8*, align 8
-    %0 = bitcast i8** %arg1 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
-    %1 = bitcast i8** %arg2 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.va_start(i8* nonnull %0)
-    call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
-    %2 = va_arg i8** %arg1, i32
-    %add = add nsw i32 %2, %a
-    %3 = va_arg i8** %arg2, i32
-    %mul = shl i32 %3, 1
+    %arg1 = alloca ptr, align 8
+    %arg2 = alloca ptr, align 8
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg1)
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.va_start(ptr nonnull %arg1)
+    call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
+    %0 = va_arg ptr %arg1, i32
+    %add = add nsw i32 %0, %a
+    %1 = va_arg ptr %arg2, i32
+    %mul = shl i32 %1, 1
     %add3 = add nsw i32 %add, %mul
-    call void @llvm.va_end(i8* nonnull %0)
-    call void @llvm.va_end(i8* nonnull %1)
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
+    call void @llvm.va_end(ptr nonnull %arg1)
+    call void @llvm.va_end(ptr nonnull %arg2)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg1)
     ret i32 %add3
   }
 
-  declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
-  declare void @llvm.va_start(i8*)
-  declare void @llvm.va_copy(i8*, i8*)
-  declare void @llvm.va_end(i8*)
-  declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+  declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+  declare void @llvm.va_start(ptr)
+  declare void @llvm.va_copy(ptr, ptr)
+  declare void @llvm.va_end(ptr)
+  declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
 
 ; 64BIT-LABEL:   name:            int_va_arg
 ; 64BIT-LABEL:   liveins:
@@ -62,12 +60,12 @@
 ; 64BIT-DAG:     STD killed renamable $x9, 40, %fixed-stack.0 :: (store (s64))
 ; 64BIT-DAG:     STD killed renamable $x10, 48, %fixed-stack.0 :: (store (s64))
 ; 64BIT-DAG:     renamable $x11 = ADDI8 %fixed-stack.0, 0
-; 64BIT-DAG:     STD renamable $x11, 0, %stack.1.arg2 :: (store (s64) into %ir.1)
+; 64BIT-DAG:     STD renamable $x11, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
 ; 64BIT-DAG:     renamable $x6 = LD 0, %stack.1.arg2 :: (load (s64) from %ir.arg2)
 ; 64BIT-DAG:     renamable $x9 = ADDI8 renamable $x6, 4
 ; 64BIT-DAG:     renamable $x7 = ADDI8 %fixed-stack.0, 4
 ; 64BIT-DAG:     renamable $r8 = LWZ 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0, align 8)
-; 64BIT-DAG:     STD killed renamable $x11, 0, %stack.0.arg1 :: (store (s64) into %ir.0)
+; 64BIT-DAG:     STD killed renamable $x11, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
 ; 64BIT-DAG:     STD killed renamable $x7, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
 ; 64BIT-DAG:     STD killed renamable $x9, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
 ; 64BIT-DAG:     renamable $r4 = LWZ 0, killed renamable $x6 :: (load (s32))
@@ -101,14 +99,12 @@
 
   define i32 @int_stack_va_arg(i32 %one, i32 %two, i32 %three, i32 %four, i32 %five, i32 %six, i32 %seven, i32 %eight, ...) local_unnamed_addr {
   entry:
-    %arg1 = alloca i8*, align 8
-    %arg2 = alloca i8*, align 8
-    %0 = bitcast i8** %arg1 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
-    %1 = bitcast i8** %arg2 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.va_start(i8* nonnull %0)
-    call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
+    %arg1 = alloca ptr, align 8
+    %arg2 = alloca ptr, align 8
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg1)
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.va_start(ptr nonnull %arg1)
+    call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
     %add = add nsw i32 %two, %one
     %add2 = add nsw i32 %add, %three
     %add3 = add nsw i32 %add2, %four
@@ -116,15 +112,15 @@
     %add5 = add nsw i32 %add4, %six
     %add6 = add nsw i32 %add5, %seven
     %add7 = add nsw i32 %add6, %eight
-    %2 = va_arg i8** %arg1, i32
-    %add8 = add nsw i32 %add7, %2
-    %3 = va_arg i8** %arg2, i32
-    %mul = shl i32 %3, 1
+    %0 = va_arg ptr %arg1, i32
+    %add8 = add nsw i32 %add7, %0
+    %1 = va_arg ptr %arg2, i32
+    %mul = shl i32 %1, 1
     %add10 = add nsw i32 %add8, %mul
-    call void @llvm.va_end(i8* nonnull %0)
-    call void @llvm.va_end(i8* nonnull %1)
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
+    call void @llvm.va_end(ptr nonnull %arg1)
+    call void @llvm.va_end(ptr nonnull %arg2)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg1)
     ret i32 %add10
   }
 
@@ -176,23 +172,21 @@
 
   define double @double_va_arg(double %a, ...) local_unnamed_addr  {
   entry:
-    %arg1 = alloca i8*, align 8
-    %arg2 = alloca i8*, align 8
-    %0 = bitcast i8** %arg1 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
-    %1 = bitcast i8** %arg2 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.va_start(i8* nonnull %0)
-    call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
-    %2 = va_arg i8** %arg1, double
-    %add = fadd double %2, %a
-    %3 = va_arg i8** %arg2, double
-    %mul = fmul double %3, 2.000000e+00
+    %arg1 = alloca ptr, align 8
+    %arg2 = alloca ptr, align 8
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg1)
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.va_start(ptr nonnull %arg1)
+    call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
+    %0 = va_arg ptr %arg1, double
+    %add = fadd double %0, %a
+    %1 = va_arg ptr %arg2, double
+    %mul = fmul double %1, 2.000000e+00
     %add3 = fadd double %add, %mul
-    call void @llvm.va_end(i8* nonnull %0)
-    call void @llvm.va_end(i8* nonnull %1)
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
+    call void @llvm.va_end(ptr nonnull %arg1)
+    call void @llvm.va_end(ptr nonnull %arg2)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg1)
     ret double %add3
   }
 
@@ -224,10 +218,10 @@
 ; 64BIT-DAG:     STD killed renamable $x8, 32, %fixed-stack.0 :: (store (s64))
 ; 64BIT-DAG:     STD killed renamable $x9, 40, %fixed-stack.0 :: (store (s64))
 ; 64BIT-DAG:     STD killed renamable $x10, 48, %fixed-stack.0 :: (store (s64))
-; 64BIT-DAG:     STD renamable $x3, 0, %stack.1.arg2 :: (store (s64) into %ir.1)
+; 64BIT-DAG:     STD renamable $x3, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
 ; 64BIT-DAG:     renamable $x6 = LD 0, %stack.1.arg2 :: (load (s64) from %ir.arg2)
 ; 64BIT-DAG:     renamable $x7 = ADDI8 %fixed-stack.0, 8
-; 64BIT-DAG:     STD killed renamable $x3, 0, %stack.0.arg1 :: (store (s64) into %ir.0)
+; 64BIT-DAG:     STD killed renamable $x3, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
 ; 64BIT-DAG:     STD killed renamable $x7, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
 ; 64BIT-DAG:     renamable $f0 = LFD 0, %fixed-stack.0 :: (load (s64))
 ; 64BIT-DAG:     renamable $x3 = ADDI8 renamable $x6, 8
@@ -263,14 +257,12 @@
 
   define double @double_stack_va_arg(double %one, double %two, double %three, double %four, double %five, double %six, double %seven, double %eight, double %nine, double %ten, double %eleven, double %twelve, double %thirteen, ...) local_unnamed_addr  {
   entry:
-    %arg1 = alloca i8*, align 8
-    %arg2 = alloca i8*, align 8
-    %0 = bitcast i8** %arg1 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
-    %1 = bitcast i8** %arg2 to i8*
-    call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.va_start(i8* nonnull %0)
-    call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
+    %arg1 = alloca ptr, align 8
+    %arg2 = alloca ptr, align 8
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg1)
+    call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.va_start(ptr nonnull %arg1)
+    call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
     %add = fadd double %one, %two
     %add2 = fadd double %add, %three
     %add3 = fadd double %add2, %four
@@ -283,13 +275,13 @@
     %add10 = fadd double %add9, %eleven
     %add11 = fadd double %add10, %twelve
     %add12 = fadd double %add11, %thirteen
-    %2 = va_arg i8** %arg1, double
-    %add13 = fadd double %add12, %2
-    %3 = va_arg i8** %arg2, double
-    %mul = fmul double %3, 2.000000e+00
+    %0 = va_arg ptr %arg1, double
+    %add13 = fadd double %add12, %0
+    %1 = va_arg ptr %arg2, double
+    %mul = fmul double %1, 2.000000e+00
     %add15 = fadd double %add13, %mul
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
-    call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg2)
+    call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg1)
     ret double %add15
   }
 

diff  --git a/llvm/test/CodeGen/PowerPC/fast-isel-branch.ll b/llvm/test/CodeGen/PowerPC/fast-isel-branch.ll
index 3ea6a567977e3..98f08830e3c82 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-branch.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-branch.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -opaque-pointers=0 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=ELF64
-; RUN: llc -opaque-pointers=0 -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck %s -check-prefix=AIX64
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=ELF64
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck %s -check-prefix=AIX64
 
 @x = global i32 1000, align 4
 
@@ -8,17 +8,17 @@ define signext i32 @bar() #0 {
 ; ELF64-LABEL: bar:
 ; ELF64:       # %bb.0: # %entry
 ; ELF64-NEXT:    mflr 0
-; ELF64-NEXT:    stdu 1, -48(1)
-; ELF64-NEXT:    std 0, 64(1)
-; ELF64-NEXT:    .cfi_def_cfa_offset 48
+; ELF64-NEXT:    stdu 1, -112(1)
+; ELF64-NEXT:    std 0, 128(1)
+; ELF64-NEXT:    .cfi_def_cfa_offset 112
 ; ELF64-NEXT:    .cfi_offset lr, 16
 ; ELF64-NEXT:    li 3, 0
-; ELF64-NEXT:    stw 3, 44(1)
+; ELF64-NEXT:    stw 3, 108(1)
 ; ELF64-NEXT:    li 3, 0
-; ELF64-NEXT:    stw 3, 40(1)
+; ELF64-NEXT:    stw 3, 104(1)
 ; ELF64-NEXT:  .LBB0_1: # %for.cond
 ; ELF64-NEXT:    #
-; ELF64-NEXT:    lwz 3, 40(1)
+; ELF64-NEXT:    lwz 3, 104(1)
 ; ELF64-NEXT:    addis 4, 2, .LC0 at toc@ha
 ; ELF64-NEXT:    ld 4, .LC0 at toc@l(4)
 ; ELF64-NEXT:    lwz 4, 0(4)
@@ -30,13 +30,13 @@ define signext i32 @bar() #0 {
 ; ELF64-NEXT:    nop
 ; ELF64-NEXT:  # %bb.3: # %for.inc
 ; ELF64-NEXT:    #
-; ELF64-NEXT:    lwz 3, 40(1)
+; ELF64-NEXT:    lwz 3, 104(1)
 ; ELF64-NEXT:    addi 3, 3, 1
-; ELF64-NEXT:    stw 3, 40(1)
+; ELF64-NEXT:    stw 3, 104(1)
 ; ELF64-NEXT:    b .LBB0_1
 ; ELF64-NEXT:  .LBB0_4: # %for.end
 ; ELF64-NEXT:    li 3, 0
-; ELF64-NEXT:    addi 1, 1, 48
+; ELF64-NEXT:    addi 1, 1, 112
 ; ELF64-NEXT:    ld 0, 16(1)
 ; ELF64-NEXT:    mtlr 0
 ; ELF64-NEXT:    blr
@@ -53,7 +53,7 @@ define signext i32 @bar() #0 {
 ; AIX64-NEXT:  L..BB0_1: # %for.cond
 ; AIX64-NEXT:    #
 ; AIX64-NEXT:    lwz 3, 120(1)
-; AIX64-NEXT:    ld 4, L..C0(2)
+; AIX64-NEXT:    ld 4, L..C0(2) # @x
 ; AIX64-NEXT:    lwz 4, 0(4)
 ; AIX64-NEXT:    cmpw 3, 4
 ; AIX64-NEXT:    bge 0, L..BB0_4

diff  --git a/llvm/test/CodeGen/PowerPC/func-alias.ll b/llvm/test/CodeGen/PowerPC/func-alias.ll
index 6c48e4378b45d..1f0a3b1c3d091 100644
--- a/llvm/test/CodeGen/PowerPC/func-alias.ll
+++ b/llvm/test/CodeGen/PowerPC/func-alias.ll
@@ -1,9 +1,9 @@
-; RUN: llc -opaque-pointers=0 -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: llc -fast-isel=false -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefix=P9
-; RUN: llc -opaque-pointers=0 -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: llc -fast-isel=false -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefix=P10
 
- at newname = dso_local alias i32 (...), bitcast (i32 ()* @oldname to i32 (...)*)
+ at newname = dso_local alias i32 (...), ptr @oldname
 
 ; Function Attrs: noinline nounwind optnone
 define dso_local signext i32 @oldname() #0 {
@@ -22,7 +22,7 @@ define dso_local signext i32 @caller() #0 {
 ; #P10-NOT:   nop
 ; #P10:       blr
 entry:
-  %call = call signext i32 bitcast (i32 (...)* @newname to i32 ()*)()
+  %call = call signext i32 @newname()
   ret i32 %call
 }
 
@@ -38,7 +38,7 @@ define dso_local signext i32 @caller_nopcrel() #1 {
 ; #P10-NEXT:  nop
 ; #P10:       blr
 entry:
-  %call = call signext i32 bitcast (i32 (...)* @newname to i32 ()*)()
+  %call = call signext i32 @newname()
   ret i32 %call
 }
 

diff  --git a/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll b/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll
index 8a03d2804a05a..f9ef6f6998fd6 100644
--- a/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll
+++ b/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll
@@ -1,16 +1,16 @@
-; RUN: llc -opaque-pointers=0 -verify-machineinstrs < %s -print-lsr-output 2>&1 | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -print-lsr-output 2>&1 | FileCheck %s
 
 ; The icmp is a post-inc use, and the increment is in %bb11, but the
 ; scevgep needs to be inserted in %bb so that it is dominated by %t.
 
-; CHECK: %t = load i8*, i8** %inp
-; CHECK: %scevgep = getelementptr i8, i8* %t, i32 %lsr.iv.next
-; CHECK: %c1 = icmp ult i8* %scevgep, %inp2
+; CHECK: %t = load ptr, ptr %inp
+; CHECK: %uglygep = getelementptr i8, ptr %t, i32 %lsr.iv.next
+; CHECK: %c1 = icmp ult ptr %uglygep, %inp2
 
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
 target triple = "powerpc-unknown-linux-gnu"
 
-define void @foo(i8** %inp, i8* %inp2) nounwind {
+define void @foo(ptr %inp, ptr %inp2) nounwind {
 entry:
   br label %bb11
 
@@ -21,9 +21,9 @@ bb11:
   br i1 %c0, label %bb13, label %bb
 
 bb:
-  %t = load i8*, i8** %inp, align 16                ; <i8*> [#uses=1]
-  %p = getelementptr i8, i8* %t, i32 %ii ; <i8*> [#uses=1]
-  %c1 = icmp ult i8* %p,  %inp2          ; <i1> [#uses=1]
+  %t = load ptr, ptr %inp, align 16                ; <ptr> [#uses=1]
+  %p = getelementptr i8, ptr %t, i32 %ii ; <ptr> [#uses=1]
+  %c1 = icmp ult ptr %p,  %inp2          ; <i1> [#uses=1]
   %i.next = add i32 %i, 1                        ; <i32> [#uses=1]
   br i1 %c1, label %bb11, label %bb13
 

diff  --git a/llvm/test/CodeGen/PowerPC/memcmpIR.ll b/llvm/test/CodeGen/PowerPC/memcmpIR.ll
index 0737ba70d1e67..0a8bec7dc0e3f 100644
--- a/llvm/test/CodeGen/PowerPC/memcmpIR.ll
+++ b/llvm/test/CodeGen/PowerPC/memcmpIR.ll
@@ -1,70 +1,62 @@
-; RUN: llc -opaque-pointers=0 -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s
-; RUN: llc -opaque-pointers=0 -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE
+; RUN: llc -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s
+; RUN: llc -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE
 
-define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {
+define signext i32 @test1(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2)  {
 entry:
   ; CHECK-LABEL: @test1(
-  ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*
-  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
-  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
-  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
-  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
-  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
-
   ; CHECK-LABEL: res_block:{{.*}}
   ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
   ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
   ; CHECK-NEXT: br label %endblock
 
+  ; CHECK-LABEL: loadbb:{{.*}}
+  ; CHECK: [[LOAD1:%[0-9]+]] = load i64, ptr
+  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, ptr
+  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
+  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
+  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
+  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
+
   ; CHECK-LABEL: loadbb1:{{.*}}
-  ; CHECK: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8*
-  ; CHECK-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8*
-  ; CHECK-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i64 8
-  ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i64 8
-  ; CHECK-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64*
-  ; CHECK-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64*
-  ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]]
-  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]]
+  ; CHECK-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, ptr {{.*}}, i64 8
+  ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, ptr {{.*}}, i64 8
+  ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, ptr [[GEP1]]
+  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, ptr [[GEP2]]
   ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
   ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
   ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
   ; CHECK-NEXT:  br i1 [[ICMP]], label %endblock, label %res_block
 
   ; CHECK-BE-LABEL: @test1(
-  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*
-  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
-  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
-  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
-
   ; CHECK-BE-LABEL: res_block:{{.*}}
   ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
   ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
   ; CHECK-BE-NEXT: br label %endblock
 
+  ; CHECK-BE-LABEL: loadbb:{{.*}}
+  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, ptr
+  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, ptr
+  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
+  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
+
   ; CHECK-BE-LABEL: loadbb1:{{.*}}
-  ; CHECK-BE: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8*
-  ; CHECK-BE-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8*
-  ; CHECK-BE-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i64 8
-  ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i64 8
-  ; CHECK-BE-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64*
-  ; CHECK-BE-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64*
-  ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]]
-  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]]
+  ; CHECK-BE-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, ptr {{.*}}, i64 8
+  ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, ptr {{.*}}, i64 8
+  ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, ptr [[GEP1]]
+  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, ptr [[GEP2]]
   ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
   ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %endblock, label %res_block
 
-  %0 = bitcast i32* %buffer1 to i8*
-  %1 = bitcast i32* %buffer2 to i8*
-  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16)
+  %call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 16)
   ret i32 %call
 }
 
-declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1
+declare signext i32 @memcmp(ptr nocapture, ptr nocapture, i64) local_unnamed_addr #1
 
-define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {
+define signext i32 @test2(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2)  {
   ; CHECK-LABEL: @test2(
-  ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*
-  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
+  ; CHECK: [[LOAD1:%[0-9]+]] = load i32, ptr
+  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, ptr
   ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
   ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
   ; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[BSWAP1]], [[BSWAP2]]
@@ -75,8 +67,8 @@ define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture reado
   ; CHECK-NEXT: ret i32 [[SUB]]
 
   ; CHECK-BE-LABEL: @test2(
-  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
-  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
+  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, ptr
+  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, ptr
   ; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[LOAD1]], [[LOAD2]]
   ; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]]
   ; CHECK-BE-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32
@@ -85,28 +77,27 @@ define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture reado
   ; CHECK-BE-NEXT: ret i32 [[SUB]]
 
 entry:
-  %0 = bitcast i32* %buffer1 to i8*
-  %1 = bitcast i32* %buffer2 to i8*
-  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4)
+  %call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 4)
   ret i32 %call
 }
 
-define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {
-  ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*
-  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
-  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
-  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
-  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
-  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
-
+define signext i32 @test3(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2)  {
   ; CHECK-LABEL: res_block:{{.*}}
   ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
   ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
   ; CHECK-NEXT: br label %endblock
 
+  ; CHECK-LABEL: loadbb:{{.*}}
+  ; CHECK: [[LOAD1:%[0-9]+]] = load i64, ptr
+  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, ptr
+  ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
+  ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
+  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]
+  ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
+
   ; CHECK-LABEL: loadbb1:{{.*}}
-  ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*
-  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
+  ; CHECK: [[LOAD1:%[0-9]+]] = load i32, ptr
+  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, ptr
   ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
   ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
   ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64
@@ -115,8 +106,8 @@ define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture reado
   ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb2, label %res_block
 
   ; CHECK-LABEL: loadbb2:{{.*}}
-  ; CHECK: [[LOAD1:%[0-9]+]] = load i16, i16*
-  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*
+  ; CHECK: [[LOAD1:%[0-9]+]] = load i16, ptr
+  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, ptr
   ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD1]])
   ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD2]])
   ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[BSWAP1]] to i64
@@ -125,68 +116,63 @@ define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture reado
   ; CHECK-NEXT:  br i1 [[ICMP]], label %loadbb3, label %res_block
 
   ; CHECK-LABEL: loadbb3:{{.*}}
-  ; CHECK: [[LOAD1:%[0-9]+]] = load i8, i8*
-  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*
+  ; CHECK: [[LOAD1:%[0-9]+]] = load i8, ptr
+  ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, ptr
   ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32
   ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32
   ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]
   ; CHECK-NEXT:  br label %endblock
 
-  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*
-  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
-  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
-  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
-
   ; CHECK-BE-LABEL: res_block:{{.*}}
   ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
   ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
   ; CHECK-BE-NEXT: br label %endblock
 
-  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
-  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
+  ; CHECK-BE-LABEL: loadbb:{{.*}}
+  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, ptr
+  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, ptr
+  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
+  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb1, label %res_block
+
+  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, ptr
+  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, ptr
   ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64
   ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64
   ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
   ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb2, label %res_block
 
-  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, i16*
-  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*
+  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, ptr
+  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, ptr
   ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[LOAD1]] to i64
   ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[LOAD2]] to i64
   ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
   ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %loadbb3, label %res_block
 
-  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, i8*
-  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*
+  ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, ptr
+  ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, ptr
   ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32
   ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32
   ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]
   ; CHECK-BE-NEXT:  br label %endblock
 
 entry:
-  %0 = bitcast i32* %buffer1 to i8*
-  %1 = bitcast i32* %buffer2 to i8*
-  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15)
+  %call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 15)
   ret i32 %call
 }
   ; CHECK: call = tail call signext i32 @memcmp
   ; CHECK-BE: call = tail call signext i32 @memcmp
-define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2)  {
+define signext i32 @test4(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2)  {
 
 entry:
-  %0 = bitcast i32* %buffer1 to i8*
-  %1 = bitcast i32* %buffer2 to i8*
-  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65)
+  %call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 65)
   ret i32 %call
 }
 
-define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE)  {
+define signext i32 @test5(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2, i32 signext %SIZE)  {
   ; CHECK: call = tail call signext i32 @memcmp
   ; CHECK-BE: call = tail call signext i32 @memcmp
 entry:
-  %0 = bitcast i32* %buffer1 to i8*
-  %1 = bitcast i32* %buffer2 to i8*
   %conv = sext i32 %SIZE to i64
-  %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv)
+  %call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 %conv)
   ret i32 %call
 }

diff  --git a/llvm/test/CodeGen/PowerPC/p10-fi-elim.ll b/llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
index 85aebeb7e5555..f70f95b428ff7 100644
--- a/llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -opaque-pointers=0 -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
 ; RUN:   FileCheck %s
-; RUN: llc -opaque-pointers=0 -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
 ; RUN:   FileCheck %s --check-prefix=CHECK-BE
 
@@ -12,13 +12,13 @@
 %100 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64] }>
 %101 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64], [24 x i8] }>
 %102 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64] }>
-%103 = type <{ [152 x i8]*, i8, i8, i8, i8, [4 x i8], i32, [12 x i8], i32, [4 x i8] }>
+%103 = type <{ ptr, i8, i8, i8, i8, [4 x i8], i32, [12 x i8], i32, [4 x i8] }>
 %104 = type <{ i32 }>
 %105 = type <{ i32 }>
 %106 = type <{ i32 }>
 
 ; Function Attrs: nobuiltin norecurse
-define dso_local signext i32 @test_FI_elim([40 x i8]* noalias nocapture dereferenceable(40) %arg, [0 x %96]* noalias nocapture nonnull readonly %arg2, [0 x %97]* noalias nocapture nonnull readonly %arg3, [0 x %98]* noalias nocapture nonnull readonly %arg4, %100* noalias nocapture dereferenceable(48) %arg6, %101* noalias nocapture dereferenceable(72) %arg7) local_unnamed_addr #2 {
+define dso_local signext i32 @test_FI_elim(ptr noalias nocapture dereferenceable(40) %arg, ptr noalias nocapture nonnull readonly %arg2, ptr noalias nocapture nonnull readonly %arg3, ptr noalias nocapture nonnull readonly %arg4, ptr noalias nocapture dereferenceable(48) %arg6, ptr noalias nocapture dereferenceable(72) %arg7) local_unnamed_addr #2 {
 ; CHECK-LABEL: test_FI_elim:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    mflr r0
@@ -29,16 +29,14 @@ define dso_local signext i32 @test_FI_elim([40 x i8]* noalias nocapture derefere
 ; CHECK-NEXT:    lxv v2, 0(r3)
 ; CHECK-NEXT:    mr r9, r6
 ; CHECK-NEXT:    mr r6, r5
-; CHECK-NEXT:    li r0, 4
-; CHECK-NEXT:    li r11, 3
-; CHECK-NEXT:    std r0, 0(r3)
-; CHECK-NEXT:    stb r11, 0(0)
 ; CHECK-NEXT:    li r12, -127
+; CHECK-NEXT:    li r0, 4
 ; CHECK-NEXT:    stb r12, 0(r3)
 ; CHECK-NEXT:    li r2, 1
-; CHECK-NEXT:    stb r11, 0(r3)
-; CHECK-NEXT:    stb r12, 0(r3)
+; CHECK-NEXT:    std r0, 0(r3)
 ; CHECK-NEXT:    stw r2, 0(r3)
+; CHECK-NEXT:    li r11, 3
+; CHECK-NEXT:    stb r11, 0(0)
 ; CHECK-NEXT:    mfvsrd r5, v2
 ; CHECK-NEXT:    vaddudm v3, v2, v2
 ; CHECK-NEXT:    pstxv v2, 64(r1), 0
@@ -47,18 +45,20 @@ define dso_local signext i32 @test_FI_elim([40 x i8]* noalias nocapture derefere
 ; CHECK-NEXT:    std r5, 0(r3)
 ; CHECK-NEXT:    lbz r5, 2(r7)
 ; CHECK-NEXT:    mr r7, r9
-; CHECK-NEXT:    neg r10, r10
+; CHECK-NEXT:    stb r11, 0(r3)
+; CHECK-NEXT:    stb r12, 0(r3)
 ; CHECK-NEXT:    std r2, 0(r3)
-; CHECK-NEXT:    std r0, 0(r3)
-; CHECK-NEXT:    std r10, 0(r3)
+; CHECK-NEXT:    neg r10, r10
 ; CHECK-NEXT:    rlwinm r5, r5, 0, 27, 27
 ; CHECK-NEXT:    stb r5, 0(0)
 ; CHECK-NEXT:    lbz r5, 2(r8)
 ; CHECK-NEXT:    rlwinm r5, r5, 0, 27, 27
 ; CHECK-NEXT:    stb r5, 0(r3)
 ; CHECK-NEXT:    li r5, 2
+; CHECK-NEXT:    std r0, 0(r3)
 ; CHECK-NEXT:    stw r5, 0(r3)
 ; CHECK-NEXT:    mr r5, r4
+; CHECK-NEXT:    std r10, 0(r3)
 ; CHECK-NEXT:    bl foo at notoc
 ; CHECK-NEXT:    extsw r3, r3
 ; CHECK-NEXT:    addi r1, r1, 80
@@ -77,37 +77,37 @@ define dso_local signext i32 @test_FI_elim([40 x i8]* noalias nocapture derefere
 ; CHECK-BE-NEXT:    lxv v2, 0(r3)
 ; CHECK-BE-NEXT:    mr r9, r6
 ; CHECK-BE-NEXT:    mr r6, r5
-; CHECK-BE-NEXT:    li r0, 4
-; CHECK-BE-NEXT:    li r11, 3
 ; CHECK-BE-NEXT:    std r30, 160(r1) # 8-byte Folded Spill
-; CHECK-BE-NEXT:    std r0, 0(r3)
-; CHECK-BE-NEXT:    stb r11, 0(0)
 ; CHECK-BE-NEXT:    li r12, -127
+; CHECK-BE-NEXT:    li r0, 4
 ; CHECK-BE-NEXT:    stb r12, 0(r3)
 ; CHECK-BE-NEXT:    li r30, 1
-; CHECK-BE-NEXT:    stb r11, 0(r3)
-; CHECK-BE-NEXT:    stb r12, 0(r3)
+; CHECK-BE-NEXT:    std r0, 0(r3)
+; CHECK-BE-NEXT:    stw r30, 0(r3)
+; CHECK-BE-NEXT:    li r11, 3
+; CHECK-BE-NEXT:    stb r11, 0(0)
 ; CHECK-BE-NEXT:    mfvsrld r5, v2
 ; CHECK-BE-NEXT:    vaddudm v3, v2, v2
-; CHECK-BE-NEXT:    stw r30, 0(r3)
 ; CHECK-BE-NEXT:    pstxv v2, 144(r1), 0
 ; CHECK-BE-NEXT:    mfvsrld r10, v3
 ; CHECK-BE-NEXT:    neg r5, r5
 ; CHECK-BE-NEXT:    std r5, 0(r3)
 ; CHECK-BE-NEXT:    lbz r5, 2(r7)
 ; CHECK-BE-NEXT:    mr r7, r9
-; CHECK-BE-NEXT:    neg r10, r10
+; CHECK-BE-NEXT:    stb r11, 0(r3)
+; CHECK-BE-NEXT:    stb r12, 0(r3)
 ; CHECK-BE-NEXT:    std r30, 0(r3)
-; CHECK-BE-NEXT:    std r0, 0(r3)
-; CHECK-BE-NEXT:    std r10, 0(r3)
+; CHECK-BE-NEXT:    neg r10, r10
 ; CHECK-BE-NEXT:    rlwinm r5, r5, 0, 27, 27
 ; CHECK-BE-NEXT:    stb r5, 0(0)
 ; CHECK-BE-NEXT:    lbz r5, 2(r8)
 ; CHECK-BE-NEXT:    rlwinm r5, r5, 0, 27, 27
 ; CHECK-BE-NEXT:    stb r5, 0(r3)
 ; CHECK-BE-NEXT:    li r5, 2
+; CHECK-BE-NEXT:    std r0, 0(r3)
 ; CHECK-BE-NEXT:    stw r5, 0(r3)
 ; CHECK-BE-NEXT:    mr r5, r4
+; CHECK-BE-NEXT:    std r10, 0(r3)
 ; CHECK-BE-NEXT:    bl foo
 ; CHECK-BE-NEXT:    nop
 ; CHECK-BE-NEXT:    ld r30, 160(r1) # 8-byte Folded Reload
@@ -118,42 +118,37 @@ define dso_local signext i32 @test_FI_elim([40 x i8]* noalias nocapture derefere
 ; CHECK-BE-NEXT:    blr
 bb:
   %i = alloca %102, align 8
-  %i8 = load <2 x i64>, <2 x i64>* undef, align 8
+  %i8 = load <2 x i64>, ptr undef, align 8
   %i9 = extractelement <2 x i64> %i8, i32 1
   %i10 = sub i64 0, %i9
-  %i11 = load <2 x i64>, <2 x i64>* undef, align 8
-  %i12 = load <2 x i64>, <2 x i64>* undef, align 8
+  %i11 = load <2 x i64>, ptr undef, align 8
+  %i12 = load <2 x i64>, ptr undef, align 8
   %i13 = add nsw <2 x i64> %i11, %i12
   %i14 = extractelement <2 x i64> %i13, i32 1
   %i15 = sub i64 0, %i14
-  store i8 3, i8* null, align 8
-  store i8 -127, i8* undef, align 1
-  store i64 4, i64* undef, align 8
-  store i32 1, i32* undef, align 4
-  %i16 = getelementptr inbounds %102, %102* %i, i64 0, i32 8, i64 0
-  %i17 = bitcast i64* %i16 to <2 x i64>*
-  store <2 x i64> %i8, <2 x i64>* %i17, align 8
-  store i64 %i10, i64* undef, align 8
-  store i8 3, i8* undef, align 8
-  %i18 = getelementptr inbounds %100, %100* %arg6, i64 0, i32 2
-  %i19 = load i8, i8* %i18, align 1
+  store i8 3, ptr null, align 8
+  store i8 -127, ptr undef, align 1
+  store i64 4, ptr undef, align 8
+  store i32 1, ptr undef, align 4
+  %i16 = getelementptr inbounds %102, ptr %i, i64 0, i32 8, i64 0
+  store <2 x i64> %i8, ptr %i16, align 8
+  store i64 %i10, ptr undef, align 8
+  store i8 3, ptr undef, align 8
+  %i18 = getelementptr inbounds %100, ptr %arg6, i64 0, i32 2
+  %i19 = load i8, ptr %i18, align 1
   %i20 = and i8 %i19, 16
-  store i8 %i20, i8* null, align 2
-  store i8 -127, i8* undef, align 1
-  store i64 1, i64* undef, align 8
-  %i21 = getelementptr inbounds %101, %101* %arg7, i64 0, i32 2
-  %i22 = load i8, i8* %i21, align 1
+  store i8 %i20, ptr null, align 2
+  store i8 -127, ptr undef, align 1
+  store i64 1, ptr undef, align 8
+  %i21 = getelementptr inbounds %101, ptr %arg7, i64 0, i32 2
+  %i22 = load i8, ptr %i21, align 1
   %i23 = and i8 %i22, 16
-  store i8 %i23, i8* undef, align 2
-  store i64 4, i64* undef, align 8
-  store i32 2, i32* undef, align 4
-  store i64 %i15, i64* undef, align 8
-  %i24 = bitcast [40 x i8]* %arg to %103*
-  %i25 = bitcast [0 x %96]* %arg2 to [0 x %104]*
-  %i26 = bitcast [0 x %97]* %arg3 to [0 x %105]*
-  %i27 = bitcast [0 x %98]* %arg4 to [0 x %106]*
-  %i28 = call i32 @foo(%103* nonnull %i24, i32* nonnull undef, [0 x %104]* %i25, [0 x %105]* %i26, [0 x %106]* %i27)
+  store i8 %i23, ptr undef, align 2
+  store i64 4, ptr undef, align 8
+  store i32 2, ptr undef, align 4
+  store i64 %i15, ptr undef, align 8
+  %i28 = call i32 @foo(ptr nonnull %arg, ptr nonnull undef, ptr %arg2, ptr %arg3, ptr %arg4)
   ret i32 %i28
 }
 
-declare dso_local i32 @foo(%103*, i32*, [0 x %104]*, [0 x %105]*, [0 x %106]*) local_unnamed_addr #1
+declare dso_local i32 @foo(ptr, ptr, ptr, ptr, ptr) local_unnamed_addr #1

diff  --git a/llvm/test/CodeGen/PowerPC/ppc64-gep-opt.ll b/llvm/test/CodeGen/PowerPC/ppc64-gep-opt.ll
index d06b9328cf209..2dca3871f8f2a 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-gep-opt.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-gep-opt.ll
@@ -1,5 +1,5 @@
-; RUN: llc -opaque-pointers=0 -verify-machineinstrs -O3 -mcpu=pwr7 < %s | FileCheck %s
-; RUN: llc -opaque-pointers=0 -verify-machineinstrs -O3 -print-after=codegenprepare -mcpu=pwr7  < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-UseAA <%t %s
+; RUN: llc -verify-machineinstrs -O3 -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -O3 -print-after=codegenprepare -mcpu=pwr7  < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-UseAA <%t %s
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
@@ -12,16 +12,16 @@ target triple = "powerpc64-unknown-linux-gnu"
 
 ; Check that when two complex GEPs are used in two basic blocks, LLVM can
 ; elimilate the common subexpression for the second use.
-define void @test_GEP_CSE([240 x %struct]* %string, i32* %adj, i32 %lib, i64 %idxprom) {
-  %liberties = getelementptr [240 x %struct], [240 x %struct]* %string, i64 1, i64 %idxprom, i32 3
-  %1 = load i32, i32* %liberties, align 4
+define void @test_GEP_CSE(ptr %string, ptr %adj, i32 %lib, i64 %idxprom) {
+  %liberties = getelementptr [240 x %struct], ptr %string, i64 1, i64 %idxprom, i32 3
+  %1 = load i32, ptr %liberties, align 4
   %cmp = icmp eq i32 %1, %lib
   br i1 %cmp, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
-  %origin = getelementptr [240 x %struct], [240 x %struct]* %string, i64 1, i64 %idxprom, i32 2
-  %2 = load i32, i32* %origin, align 4
-  store i32 %2, i32* %adj, align 4
+  %origin = getelementptr [240 x %struct], ptr %string, i64 1, i64 %idxprom, i32 2
+  %2 = load i32, ptr %origin, align 4
+  store i32 %2, ptr %adj, align 4
   br label %if.end
 
 if.end:                                           ; preds = %if.then, %entry
@@ -29,38 +29,35 @@ if.end:                                           ; preds = %if.then, %entry
 }
 
 ; CHECK-UseAA-LABEL: @test_GEP_CSE(
-; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = bitcast [240 x %struct]* %string to i8*
 ; CHECK-UseAA: [[IDX:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96
-; CHECK-UseAA: [[PTR1:%[a-zA-Z0-9]+]] = getelementptr i8, i8* [[PTR0]], i64 [[IDX]]
-; CHECK-UseAA: getelementptr i8, i8* [[PTR1]], i64 23052
-; CHECK-UseAA: bitcast
+; CHECK-UseAA: [[PTR1:%[a-zA-Z0-9]+]] = getelementptr i8, ptr %string, i64 [[IDX]]
+; CHECK-UseAA: getelementptr i8, ptr [[PTR1]], i64 23052
 ; CHECK-UseAA: if.then:
-; CHECK-UseAA: getelementptr i8, i8* [[PTR1]], i64 23048
-; CHECK-UseAA: bitcast
+; CHECK-UseAA: getelementptr i8, ptr [[PTR1]], i64 23048
 
 %class.my = type { i32, [128 x i32], i32, [256 x %struct.pt]}
-%struct.pt = type { %struct.point*, i32, i32 }
+%struct.pt = type { ptr, i32, i32 }
 %struct.point = type { i32, i32 }
 
 ; Check when a GEP is used across two basic block, LLVM can sink the address
 ; calculation and code gen can generate a better addressing mode for the second
 ; use.
-define void @test_GEP_across_BB(%class.my* %this, i64 %idx) {
-  %1 = getelementptr %class.my, %class.my* %this, i64 0, i32 3, i64 %idx, i32 1
-  %2 = load i32, i32* %1, align 4
-  %3 = getelementptr %class.my, %class.my* %this, i64 0, i32 3, i64 %idx, i32 2
-  %4 = load i32, i32* %3, align 4
+define void @test_GEP_across_BB(ptr %this, i64 %idx) {
+  %1 = getelementptr %class.my, ptr %this, i64 0, i32 3, i64 %idx, i32 1
+  %2 = load i32, ptr %1, align 4
+  %3 = getelementptr %class.my, ptr %this, i64 0, i32 3, i64 %idx, i32 2
+  %4 = load i32, ptr %3, align 4
   %5 = icmp eq i32 %2, %4
   br i1 %5, label %if.true, label %exit
 
 if.true:
   %6 = shl i32 %4, 1
-  store i32 %6, i32* %3, align 4
+  store i32 %6, ptr %3, align 4
   br label %exit
 
 exit:
   %7 = add nsw i32 %4, 1
-  store i32 %7, i32* %1, align 4
+  store i32 %7, ptr %1, align 4
   ret void
 }
 ; CHECK-LABEL: test_GEP_across_BB:
@@ -69,12 +66,12 @@ exit:
 
 ; CHECK-UseAA-LABEL: test_GEP_across_BB(
 ; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = getelementptr
-; CHECK-UseAA: getelementptr i8, i8* [[PTR0]], i64 528
-; CHECK-UseAA: getelementptr i8, i8* [[PTR0]], i64 532
+; CHECK-UseAA: getelementptr i8, ptr [[PTR0]], i64 528
+; CHECK-UseAA: getelementptr i8, ptr [[PTR0]], i64 532
 ; CHECK-UseAA: if.true:
-; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8, i8* [[PTR0]], i64 532
+; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8, ptr [[PTR0]], i64 532
 ; CHECK-UseAA: exit:
-; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8, i8* [[PTR0]], i64 528
+; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8, ptr [[PTR0]], i64 528
 
 %struct.S = type { float, double }
 @struct_array = global [1024 x %struct.S] zeroinitializer, align 16
@@ -84,41 +81,41 @@ exit:
 ; The constant offsets are from indices "i64 %idxprom" and "i32 1". As the
 ; alloca size of %struct.S is 16, and "i32 1" is the 2rd element whose field
 ; offset is 8, the total constant offset is (5 * 16 + 8) = 88.
-define double* @test-struct_1(i32 %i) {
+define ptr @test-struct_1(i32 %i) {
 entry:
   %add = add nsw i32 %i, 5
   %idxprom = sext i32 %add to i64
-  %p = getelementptr [1024 x %struct.S], [1024 x %struct.S]* @struct_array, i64 0, i64 %idxprom, i32 1
-  ret double* %p
+  %p = getelementptr [1024 x %struct.S], ptr @struct_array, i64 0, i64 %idxprom, i32 1
+  ret ptr %p
 }
 ; CHECK-UseAA-LABEL: @test-struct_1(
-; CHECK-UseAA: getelementptr i8, i8* %{{[a-zA-Z0-9]+}}, i64 88
+; CHECK-UseAA: getelementptr i8, ptr %{{[a-zA-Z0-9]+}}, i64 88
 
 %struct3 = type { i64, i32 }
 %struct2 = type { %struct3, i32 }
 %struct1 = type { i64, %struct2 }
-%struct0 = type { i32, i32, i64*, [100 x %struct1] }
+%struct0 = type { i32, i32, ptr, [100 x %struct1] }
 
 ; The constant offsets are from indices "i32 3", "i64 %arrayidx" and "i32 1".
 ; "i32 3" is the 4th element whose field offset is 16. The alloca size of
 ; %struct1 is 32. "i32 1" is the 2rd element whose field offset is 8. So the
 ; total constant offset is 16 + (-2 * 32) + 8 = -40
-define %struct2* @test-struct_2(%struct0* %ptr, i64 %idx) {
+define ptr @test-struct_2(ptr %ptr, i64 %idx) {
 entry:
   %arrayidx = add nsw i64 %idx, -2
-  %ptr2 = getelementptr %struct0, %struct0* %ptr, i64 0, i32 3, i64 %arrayidx, i32 1
-  ret %struct2* %ptr2
+  %ptr2 = getelementptr %struct0, ptr %ptr, i64 0, i32 3, i64 %arrayidx, i32 1
+  ret ptr %ptr2
 }
 ; CHECK-UseAA-LABEL: @test-struct_2(
-; CHECK-UseAA: getelementptr i8, i8* %{{[a-zA-Z0-9]+}}, i64 -40
+; CHECK-UseAA: getelementptr i8, ptr %{{[a-zA-Z0-9]+}}, i64 -40
 
 ; Test that when a index is added from two constant, SeparateConstOffsetFromGEP
 ; pass does not generate incorrect result.
-define void @test_const_add([3 x i32]* %in) {
+define void @test_const_add(ptr %in) {
   %inc = add nsw i32 2, 1
   %idxprom = sext i32 %inc to i64
-  %arrayidx = getelementptr [3 x i32], [3 x i32]* %in, i64 %idxprom, i64 2
-  store i32 0, i32* %arrayidx, align 4
+  %arrayidx = getelementptr [3 x i32], ptr %in, i64 %idxprom, i64 2
+  store i32 0, ptr %arrayidx, align 4
   ret void
 }
 ; CHECK-LABEL: test_const_add:


        


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