[PATCH] D142344: [DAGCombiner] Add Transform for `(and/or (eq/ne A,Pow2),(eq/ne A,-Pow2))`->`(eq/ne (and (and A,Pow2),~(Pow2*2)), 0)`

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 29 07:41:35 PST 2023


RKSimon added inline comments.


================
Comment at: llvm/include/llvm/CodeGen/TargetLowering.h:4014
+                                                  const SDNode *SETCC0,
+                                                  const SDNode *SETCC1) const {
+    return false;
----------------
goldstein.w.n wrote:
> RKSimon wrote:
> > Drop the const from the SDNode args?
> > Drop the const from the SDNode args?
> 
> Really? All the surrounding "should I do this" functions seem to use consts:
> 
> ```
>   virtual bool isDesirableToCommuteWithShift(const SDNode *N,
>                                              CombineLevel Level) const {
>     return true;
>   }
> ...
>   virtual bool isDesirableToCombineLogicOpOfSETCC(const SDNode *LogicOp,
>                                                   const SDNode *SETCC0,
>                                                   const SDNode *SETCC1) const {
>     return false;
>   }
> 
> ...
>   virtual bool isDesirableToCommuteXorWithShift(const SDNode *N) const {
>     return true;
>   }
> 
> ```
OK - never mind


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2414
 
+
 static bool isADDLike(SDValue V, const SelectionDAG &DAG) {
----------------
remove extra newline


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:5670
+      CCL == (LogicOp->getOpcode() == ISD::AND ? ISD::SETNE : ISD::SETEQ) &&
+      LHS.hasOneUse() && RHS.hasOneUse() && LHS0 == RHS0 && LHS1C && RHS1C &&
+      OpVT.isInteger() && LHS1C->getAPIntValue() == (-RHS1C->getAPIntValue())) {
----------------
Swap over to reduce calling (expensive) hasOneUse calls unnecessarily (or maybe move to the end of the if()):
```
LHS0 == RHS0 && LHS1C && RHS1C && LHS.hasOneUse() && RHS.hasOneUse() && 
```


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:5679
+    if (Pow2 != nullptr && !Pow2->getAPIntValue().isMinSignedValue()) {
+      APInt C = Pow2->getAPIntValue();
+      SDValue AddOp =
----------------
const APInt &C = Pow2->getAPIntValue();


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  https://reviews.llvm.org/D142344/new/

https://reviews.llvm.org/D142344



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