[llvm] f68477d - GlobalISel: Include register class/bank in regbankselect debug printing

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2023-01-29T09:00:51-04:00
New Revision: f68477dda17e8238b75803170f89485c01bb541e

URL: https://github.com/llvm/llvm-project/commit/f68477dda17e8238b75803170f89485c01bb541e
DIFF: https://github.com/llvm/llvm-project/commit/f68477dda17e8238b75803170f89485c01bb541e.diff

LOG: GlobalISel: Include register class/bank in regbankselect debug printing

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
index 080f3ca540f2a..e03b40281c85a 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -162,8 +162,10 @@ bool RegBankSelect::repairReg(
     MI = MIRBuilder.buildInstrNoInsert(TargetOpcode::COPY)
       .addDef(Dst)
       .addUse(Src);
-    LLVM_DEBUG(dbgs() << "Copy: " << printReg(Src) << " to: " << printReg(Dst)
-               << '\n');
+    LLVM_DEBUG(dbgs() << "Copy: " << printReg(Src) << ':'
+                      << printRegClassOrBank(Src, *MRI, TRI)
+                      << " to: " << printReg(Dst) << ':'
+                      << printRegClassOrBank(Dst, *MRI, TRI) << '\n');
   } else {
     // TODO: Support with G_IMPLICIT_DEF + G_INSERT sequence or G_EXTRACT
     // sequence.