[llvm] 0de6193 - [RISCV] Simplify code slightly. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 28 22:47:26 PST 2023
Author: Craig Topper
Date: 2023-01-28T22:44:58-08:00
New Revision: 0de61934a37180d6028852740eaa0e9e409d001a
URL: https://github.com/llvm/llvm-project/commit/0de61934a37180d6028852740eaa0e9e409d001a
DIFF: https://github.com/llvm/llvm-project/commit/0de61934a37180d6028852740eaa0e9e409d001a.diff
LOG: [RISCV] Simplify code slightly. NFC
These two pieces of code were using a switch with a single case and
a default that always returned.
Replace with an if statement that early returns.
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 059cb2f613c7e..9a21251aac882 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1797,48 +1797,43 @@ OperandMatchResultTy RISCVAsmParser::parseVTypeI(OperandVector &Operands) {
}
OperandMatchResultTy RISCVAsmParser::parseMaskReg(OperandVector &Operands) {
- switch (getLexer().getKind()) {
- default:
+ if (getLexer().isNot(AsmToken::Identifier))
return MatchOperand_NoMatch;
- case AsmToken::Identifier:
- StringRef Name = getLexer().getTok().getIdentifier();
- if (!Name.consume_back(".t")) {
- Error(getLoc(), "expected '.t' suffix");
- return MatchOperand_ParseFail;
- }
- MCRegister RegNo;
- matchRegisterNameHelper(isRV32E(), RegNo, Name);
- if (RegNo == RISCV::NoRegister)
- return MatchOperand_NoMatch;
- if (RegNo != RISCV::V0)
- return MatchOperand_NoMatch;
- SMLoc S = getLoc();
- SMLoc E = SMLoc::getFromPointer(S.getPointer() + Name.size());
- getLexer().Lex();
- Operands.push_back(RISCVOperand::createReg(RegNo, S, E, isRV64()));
+ StringRef Name = getLexer().getTok().getIdentifier();
+ if (!Name.consume_back(".t")) {
+ Error(getLoc(), "expected '.t' suffix");
+ return MatchOperand_ParseFail;
}
+ MCRegister RegNo;
+ matchRegisterNameHelper(isRV32E(), RegNo, Name);
+ if (RegNo == RISCV::NoRegister)
+ return MatchOperand_NoMatch;
+ if (RegNo != RISCV::V0)
+ return MatchOperand_NoMatch;
+ SMLoc S = getLoc();
+ SMLoc E = SMLoc::getFromPointer(S.getPointer() + Name.size());
+ getLexer().Lex();
+ Operands.push_back(RISCVOperand::createReg(RegNo, S, E, isRV64()));
return MatchOperand_Success;
}
OperandMatchResultTy RISCVAsmParser::parseGPRAsFPR(OperandVector &Operands) {
- switch (getLexer().getKind()) {
- default:
+ if (getLexer().isNot(AsmToken::Identifier))
return MatchOperand_NoMatch;
- case AsmToken::Identifier:
- StringRef Name = getLexer().getTok().getIdentifier();
- MCRegister RegNo;
- matchRegisterNameHelper(isRV32E(), RegNo, Name);
- if (RegNo == RISCV::NoRegister)
- return MatchOperand_NoMatch;
- SMLoc S = getLoc();
- SMLoc E = SMLoc::getFromPointer(S.getPointer() - 1);
- getLexer().Lex();
- Operands.push_back(RISCVOperand::createReg(
- RegNo, S, E, isRV64(), !getSTI().hasFeature(RISCV::FeatureStdExtF)));
- }
+ StringRef Name = getLexer().getTok().getIdentifier();
+ MCRegister RegNo;
+ matchRegisterNameHelper(isRV32E(), RegNo, Name);
+
+ if (RegNo == RISCV::NoRegister)
+ return MatchOperand_NoMatch;
+ SMLoc S = getLoc();
+ SMLoc E = SMLoc::getFromPointer(S.getPointer() - 1);
+ getLexer().Lex();
+ Operands.push_back(RISCVOperand::createReg(
+ RegNo, S, E, isRV64(), !getSTI().hasFeature(RISCV::FeatureStdExtF)));
return MatchOperand_Success;
}
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