[llvm] 7a3e872 - [RISCV] Use llvm::bit_floor and std::clamp (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 28 00:49:44 PST 2023
Author: Kazu Hirata
Date: 2023-01-28T00:49:38-08:00
New Revision: 7a3e87298e2fd37c7f271adfec778a0809971439
URL: https://github.com/llvm/llvm-project/commit/7a3e87298e2fd37c7f271adfec778a0809971439
DIFF: https://github.com/llvm/llvm-project/commit/7a3e87298e2fd37c7f271adfec778a0809971439.diff
LOG: [RISCV] Use llvm::bit_floor and std::clamp (NFC)
Added:
Modified:
llvm/lib/Target/RISCV/RISCVSubtarget.cpp
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
index c935dad1687f..0cba4e3a6f50 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
@@ -157,8 +157,7 @@ unsigned RISCVSubtarget::getMaxLMULForFixedLengthVectors() const {
"Tried to get vector length without Zve or V extension support!");
assert(RVVVectorLMULMax <= 8 && isPowerOf2_32(RVVVectorLMULMax) &&
"V extension requires a LMUL to be at most 8 and a power of 2!");
- return PowerOf2Floor(
- std::max<unsigned>(std::min<unsigned>(RVVVectorLMULMax, 8), 1));
+ return llvm::bit_floor(std::clamp<unsigned>(RVVVectorLMULMax, 1, 8));
}
bool RISCVSubtarget::useRVVForFixedLengthVectors() const {
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 585eb9a19c0a..aad0cf8faef2 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -222,8 +222,8 @@ std::optional<unsigned> RISCVTTIImpl::getVScaleForTuning() const {
TypeSize
RISCVTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
- unsigned LMUL = PowerOf2Floor(
- std::max<unsigned>(std::min<unsigned>(RVVRegisterWidthLMUL, 8), 1));
+ unsigned LMUL =
+ llvm::bit_floor(std::clamp<unsigned>(RVVRegisterWidthLMUL, 1, 8));
switch (K) {
case TargetTransformInfo::RGK_Scalar:
return TypeSize::getFixed(ST->getXLen());
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