[llvm] 09b7692 - [X86] Use llvm::bit_ceil (NFC)

Kazu Hirata via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 27 18:33:32 PST 2023


Author: Kazu Hirata
Date: 2023-01-27T18:33:25-08:00
New Revision: 09b7692c62599f36093857493a96be782a48b8ee

URL: https://github.com/llvm/llvm-project/commit/09b7692c62599f36093857493a96be782a48b8ee
DIFF: https://github.com/llvm/llvm-project/commit/09b7692c62599f36093857493a96be782a48b8ee.diff

LOG: [X86] Use llvm::bit_ceil (NFC)

The argument is known to be nonzero, so we can safely switch to
llvm::bit_ceil.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index d69e2c3ed4930..249ff21f5b0e4 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4181,7 +4181,7 @@ bool X86DAGToDAGISel::tryShrinkShlLogicImm(SDNode *N) {
   if (Opcode == ISD::AND) {
     // Find the smallest zext this could possibly be.
     unsigned ZExtWidth = Cst->getAPIntValue().getActiveBits();
-    ZExtWidth = PowerOf2Ceil(std::max(ZExtWidth, 8U));
+    ZExtWidth = llvm::bit_ceil(std::max(ZExtWidth, 8U));
 
     // Figure out which bits need to be zero to achieve that mask.
     APInt NeededMask = APInt::getLowBitsSet(NVT.getSizeInBits(),


        


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