[llvm] e7e3d72 - Revert "Add optimizations for icmp eq/ne (mul(X, Y), 0)"

Noah Goldstein via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 27 16:45:27 PST 2023


Author: Noah Goldstein
Date: 2023-01-27T18:44:02-06:00
New Revision: e7e3d723a592d3f626e5371788655851672aa204

URL: https://github.com/llvm/llvm-project/commit/e7e3d723a592d3f626e5371788655851672aa204
DIFF: https://github.com/llvm/llvm-project/commit/e7e3d723a592d3f626e5371788655851672aa204.diff

LOG: Revert "Add optimizations for icmp eq/ne (mul(X, Y), 0)"

This reverts commit aa250ceb3ff15d55bb506b4bc8196f143133d8b5.

Caused test failures in Clangd: https://lab.llvm.org/buildbot/#/builders/183/builds/10447
reverting while investigating.

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    llvm/test/Transforms/InstCombine/icmp-binop.ll
    llvm/test/Transforms/InstCombine/pr38677.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 41f1fe9a07c0..8e90014d24d8 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -1295,48 +1295,6 @@ Instruction *InstCombinerImpl::foldICmpWithZero(ICmpInst &Cmp) {
       return new ICmpInst(Pred, X, Cmp.getOperand(1));
   }
 
-  // (icmp eq/ne (mul X Y)) -> (icmp eq/ne X/Y) if we know about whether X/Y are
-  // odd/non-zero/there is no overflow.
-  if (match(Cmp.getOperand(0), m_Mul(m_Value(X), m_Value(Y))) &&
-      ICmpInst::isEquality(Pred)) {
-
-    KnownBits XKnown = computeKnownBits(X, 0, &Cmp);
-    // if X % 2 != 0
-    //    (icmp eq/ne Y)
-    if (XKnown.countMaxTrailingZeros() == 0)
-      return new ICmpInst(Pred, Y, Cmp.getOperand(1));
-
-    KnownBits YKnown = computeKnownBits(Y, 0, &Cmp);
-    // if Y % 2 != 0
-    //    (icmp eq/ne X)
-    if (YKnown.countMaxTrailingZeros() == 0)
-      return new ICmpInst(Pred, X, Cmp.getOperand(1));
-
-    auto *BO0 = cast<OverflowingBinaryOperator>(Cmp.getOperand(0));
-    if (BO0->hasNoUnsignedWrap() || BO0->hasNoSignedWrap()) {
-      const SimplifyQuery Q = SQ.getWithInstruction(&Cmp);
-      // `isKnownNonZero` does more analysis than just `!KnownBits.One.isZero()`
-      // but to avoid unnecessary work, first just if this is an obvious case.
-
-      // if X non-zero and NoOverflow(X * Y)
-      //    (icmp eq/ne Y)
-      if (!XKnown.One.isZero() || isKnownNonZero(X, DL, 0, Q.AC, Q.CxtI, Q.DT))
-        return new ICmpInst(Pred, Y, Cmp.getOperand(1));
-
-      // if Y non-zero and NoOverflow(X * Y)
-      //    (icmp eq/ne X)
-      if (!YKnown.One.isZero() || isKnownNonZero(Y, DL, 0, Q.AC, Q.CxtI, Q.DT))
-        return new ICmpInst(Pred, X, Cmp.getOperand(1));
-    }
-    // Note, we are skipping cases:
-    //      if Y % 2 != 0 AND X % 2 != 0
-    //          (false/true)
-    //      if X non-zero and Y non-zero and NoOverflow(X * Y)
-    //          (false/true)
-    // Those can be simplified later as we would have already replaced the (icmp
-    // eq/ne (mul X, Y)) with (icmp eq/ne X/Y) and if X/Y is known non-zero that
-    // will fold to a constant elsewhere.
-  }
   return nullptr;
 }
 

diff  --git a/llvm/test/Transforms/InstCombine/icmp-binop.ll b/llvm/test/Transforms/InstCombine/icmp-binop.ll
index 60a12411ee91..1f4a0de2b812 100644
--- a/llvm/test/Transforms/InstCombine/icmp-binop.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-binop.ll
@@ -6,7 +6,8 @@ declare void @llvm.assume(i1)
 
 define i1 @mul_unkV_oddC_eq(i32 %v) {
 ; CHECK-LABEL: @mul_unkV_oddC_eq(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 0
+; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[V:%.*]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[MUL]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %mul = mul i32 %v, 3
@@ -27,7 +28,8 @@ define i1 @mul_unkV_oddC_eq_nonzero(i32 %v) {
 
 define <2 x i1> @mul_unkV_oddC_ne_vec(<2 x i64> %v) {
 ; CHECK-LABEL: @mul_unkV_oddC_ne_vec(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i64> [[V:%.*]], zeroinitializer
+; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i64> [[V:%.*]], <i64 3, i64 3>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i64> [[MUL]], zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %mul = mul <2 x i64> %v, <i64 3, i64 3>
@@ -70,7 +72,7 @@ define i1 @mul_unkV_oddC_sge(i8 %v) {
 define i1 @mul_reused_unkV_oddC_ne(i64 %v) {
 ; CHECK-LABEL: @mul_reused_unkV_oddC_ne(
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[V:%.*]], 3
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[V]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
 ; CHECK-NEXT:    call void @use64(i64 [[MUL]])
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
@@ -85,7 +87,8 @@ define i1 @mul_assumeoddV_unkV_eq(i16 %v, i16 %v2) {
 ; CHECK-NEXT:    [[LB:%.*]] = and i16 [[V2:%.*]], 1
 ; CHECK-NEXT:    [[ODD:%.*]] = icmp ne i16 [[LB]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[ODD]])
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i16 [[V:%.*]], 0
+; CHECK-NEXT:    [[MUL:%.*]] = mul i16 [[V:%.*]], [[V2]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i16 [[MUL]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %lb = and i16 %v2, 1
@@ -102,7 +105,7 @@ define i1 @mul_reusedassumeoddV_unkV_ne(i64 %v, i64 %v2) {
 ; CHECK-NEXT:    [[ODD:%.*]] = icmp ne i64 [[LB]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[ODD]])
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[V]], [[V2:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[V2]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
 ; CHECK-NEXT:    call void @use64(i64 [[MUL]])
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
@@ -117,7 +120,9 @@ define i1 @mul_reusedassumeoddV_unkV_ne(i64 %v, i64 %v2) {
 
 define <2 x i1> @mul_setoddV_unkV_ne(<2 x i32> %v1, <2 x i32> %v2) {
 ; CHECK-LABEL: @mul_setoddV_unkV_ne(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i32> [[V2:%.*]], zeroinitializer
+; CHECK-NEXT:    [[V:%.*]] = or <2 x i32> [[V1:%.*]], <i32 1, i32 1>
+; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i32> [[V]], [[V2:%.*]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i32> [[MUL]], zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %v = or <2 x i32> %v1, <i32 1, i32 1>
@@ -185,7 +190,8 @@ define i1 @mul_assumenzV_unkV_nsw_ne(i32 %v, i32 %v2) {
 ; CHECK-LABEL: @mul_assumenzV_unkV_nsw_ne(
 ; CHECK-NEXT:    [[NZ:%.*]] = icmp ne i32 [[V:%.*]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[NZ]])
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[V2:%.*]], 0
+; CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[V]], [[V2:%.*]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[MUL]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %nz = icmp ne i32 %v, 0
@@ -223,7 +229,9 @@ define <2 x i1> @mul_unkV_unkV_nsw_nuw_ne(<2 x i16> %v, <2 x i16> %v2) {
 
 define i1 @mul_setnzV_unkV_nuw_eq(i8 %v1, i8 %v2) {
 ; CHECK-LABEL: @mul_setnzV_unkV_nuw_eq(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[V2:%.*]], 0
+; CHECK-NEXT:    [[V:%.*]] = or i8 [[V1:%.*]], 2
+; CHECK-NEXT:    [[MUL:%.*]] = mul nuw i8 [[V]], [[V2:%.*]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[MUL]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %v = or i8 %v1, 2
@@ -237,7 +245,8 @@ define i1 @mul_brnzV_unkV_nuw_eq(i64 %v, i64 %v2) {
 ; CHECK-NEXT:    [[NZ_NOT:%.*]] = icmp eq i64 [[V2:%.*]], 0
 ; CHECK-NEXT:    br i1 [[NZ_NOT]], label [[FALSE:%.*]], label [[TRUE:%.*]]
 ; CHECK:       true:
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i64 [[V:%.*]], 0
+; CHECK-NEXT:    [[MUL:%.*]] = mul nuw i64 [[V:%.*]], [[V2]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i64 [[MUL]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ; CHECK:       false:
 ; CHECK-NEXT:    call void @use64(i64 [[V]])

diff  --git a/llvm/test/Transforms/InstCombine/pr38677.ll b/llvm/test/Transforms/InstCombine/pr38677.ll
index bacee2c67676..63c0caba1013 100644
--- a/llvm/test/Transforms/InstCombine/pr38677.ll
+++ b/llvm/test/Transforms/InstCombine/pr38677.ll
@@ -12,7 +12,9 @@ define i32 @foo(i1 %which, ptr %dst) {
 ; CHECK-NEXT:    br label [[FINAL]]
 ; CHECK:       final:
 ; CHECK-NEXT:    [[USE2:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ select (i1 icmp eq (ptr @A, ptr @B), i32 2, i32 1), [[DELAY]] ]
-; CHECK-NEXT:    store i1 false, ptr [[DST:%.*]], align 1
+; CHECK-NEXT:    [[B7:%.*]] = mul i32 [[USE2]], 2147483647
+; CHECK-NEXT:    [[C3:%.*]] = icmp eq i32 [[B7]], 0
+; CHECK-NEXT:    store i1 [[C3]], ptr [[DST:%.*]], align 1
 ; CHECK-NEXT:    ret i32 [[USE2]]
 ;
 entry:


        


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