[PATCH] D142313: [PowerPC] Replace PPCISD::VABSD(X,Y,0) cases with generic ISD::ABDU(X,Y) node
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 26 09:31:30 PST 2023
RKSimon added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:17671
N->getOperand(0)->getOperand(1),
DAG.getTargetConstant(1, dl, MVT::i32));
}
----------------
I'm wondering if this is actually correct? If there had been SIGN_EXTEND/SIGN_EXTEND_VECTOR_INREG equivalent nodes to the previous ABDU pattern then this would be ABSD.
https://alive2.llvm.org/ce/z/k8wpeF
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142313/new/
https://reviews.llvm.org/D142313
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