[llvm] 3f4faa7 - [InstCombine] add tests for cmp-of-signbits using sext+ashr; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2023-01-26T08:58:45-05:00
New Revision: 3f4faa790fe683446313090a0d1147d5fb9e0979

URL: https://github.com/llvm/llvm-project/commit/3f4faa790fe683446313090a0d1147d5fb9e0979
DIFF: https://github.com/llvm/llvm-project/commit/3f4faa790fe683446313090a0d1147d5fb9e0979.diff

LOG: [InstCombine] add tests for cmp-of-signbits using sext+ashr; NFC

These are copied from the zext+lshr variants from:
e76c95fb40b108
d1511ed8d19ac

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/icmp-shr.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/icmp-shr.ll b/llvm/test/Transforms/InstCombine/icmp-shr.ll
index e60f08cf22358..0259e601fafa8 100644
--- a/llvm/test/Transforms/InstCombine/icmp-shr.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-shr.ll
@@ -1462,3 +1462,131 @@ define i1 @exactly_one_set_signbit_wrong_pred(i8 %x, i8 %y) {
   %r = icmp sgt i8 %xsign, %yposz
   ret i1 %r
 }
+
+define i1 @exactly_one_set_signbit_signed(i8 %x, i8 %y) {
+; CHECK-LABEL: @exactly_one_set_signbit_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
+; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %xsign = ashr i8 %x, 7
+  %ypos = icmp sgt i8 %y, -1
+  %yposz = sext i1 %ypos to i8
+  %r = icmp eq i8 %xsign, %yposz
+  ret i1 %r
+}
+
+define i1 @exactly_one_set_signbit_use1_signed(i8 %x, i8 %y) {
+; CHECK-LABEL: @exactly_one_set_signbit_use1_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    call void @use(i8 [[XSIGN]])
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
+; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %xsign = ashr i8 %x, 7
+  call void @use(i8 %xsign)
+  %ypos = icmp sgt i8 %y, -1
+  %yposz = sext i1 %ypos to i8
+  %r = icmp eq i8 %xsign, %yposz
+  ret i1 %r
+}
+
+define <2 x i1> @same_signbit_signed(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @same_signbit_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr <2 x i8> [[X:%.*]], <i8 7, i8 7>
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 -1>
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext <2 x i1> [[YPOS]] to <2 x i8>
+; CHECK-NEXT:    [[R:%.*]] = icmp ne <2 x i8> [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret <2 x i1> [[R]]
+;
+  %xsign = ashr <2 x i8> %x, <i8 7, i8 7>
+  %ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 -1>
+  %yposz = sext <2 x i1> %ypos to <2 x i8>
+  %r = icmp ne <2 x i8> %xsign, %yposz
+  ret <2 x i1> %r
+}
+
+define i1 @same_signbit_use2_signed(i8 %x, i8 %y) {
+; CHECK-LABEL: @same_signbit_use2_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
+; CHECK-NEXT:    call void @use(i8 [[YPOSZ]])
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %xsign = ashr i8 %x, 7
+  %ypos = icmp sgt i8 %y, -1
+  %yposz = sext i1 %ypos to i8
+  call void @use(i8 %yposz)
+  %r = icmp ne i8 %xsign, %yposz
+  ret i1 %r
+}
+
+define i1 @same_signbit_use3_signed(i8 %x, i8 %y) {
+; CHECK-LABEL: @same_signbit_use3_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    call void @use(i8 [[XSIGN]])
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
+; CHECK-NEXT:    call void @use(i8 [[YPOSZ]])
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %xsign = ashr i8 %x, 7
+  call void @use(i8 %xsign)
+  %ypos = icmp sgt i8 %y, -1
+  %yposz = sext i1 %ypos to i8
+  call void @use(i8 %yposz)
+  %r = icmp ne i8 %xsign, %yposz
+  ret i1 %r
+}
+
+define <2 x i1> @same_signbit_poison_elts_signed(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @same_signbit_poison_elts_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr <2 x i8> [[X:%.*]], <i8 7, i8 poison>
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext <2 x i1> [[YPOS]] to <2 x i8>
+; CHECK-NEXT:    [[R:%.*]] = icmp ne <2 x i8> [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret <2 x i1> [[R]]
+;
+  %xsign = ashr <2 x i8> %x, <i8 7, i8 poison>
+  %ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 poison>
+  %yposz = sext <2 x i1> %ypos to <2 x i8>
+  %r = icmp ne <2 x i8> %xsign, %yposz
+  ret <2 x i1> %r
+}
+
+define i1 @same_signbit_wrong_type_signed(i8 %x, i32 %y) {
+; CHECK-LABEL: @same_signbit_wrong_type_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt i32 [[Y:%.*]], -1
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %xsign = ashr i8 %x, 7
+  %ypos = icmp sgt i32 %y, -1
+  %yposz = sext i1 %ypos to i8
+  %r = icmp ne i8 %xsign, %yposz
+  ret i1 %r
+}
+
+define i1 @exactly_one_set_signbit_wrong_shamt_signed(i8 %x, i8 %y) {
+; CHECK-LABEL: @exactly_one_set_signbit_wrong_shamt_signed(
+; CHECK-NEXT:    [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 6
+; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
+; CHECK-NEXT:    [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
+; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %xsign = ashr i8 %x, 6
+  %ypos = icmp sgt i8 %y, -1
+  %yposz = sext i1 %ypos to i8
+  %r = icmp eq i8 %xsign, %yposz
+  ret i1 %r
+}