[PATCH] D142474: [AArch64][SME2] Add LLVM IR intrinsics for multi-single dots

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 26 00:47:44 PST 2023


david-arm added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll:9
+
+define void @fdot_single_za32_f16_vg1x2(i32 %slice, <vscale x 16 x i8> %unused, <vscale x 8 x half> %zn0, <vscale x 8 x half> %zn1, <vscale x 8 x half> %zn2) #0 {
+; CHECK-LABEL: fdot_single_za32_f16_vg1x2:
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kmclaughlin wrote:
> Is the `%unused` argument needed for these tests, since they don't require the multi-vector lists to start at multiples of 2 or 4?
A very apposite question! So I did this deliberately because follow-on patches such as D142478 will add the other multi-multi and multi-indexed variants of the dot instructions where the register does have to be a multiple. I wanted to be consistent by adding the `%unused` parameter for all variants, and I also thought it helps to highlight the difference between them.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142474/new/

https://reviews.llvm.org/D142474



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