[llvm] a5cd202 - Use llvm::Log2_32 and llvm::Log2_64 instead of llvm::findLastSet (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 25 21:34:19 PST 2023
Author: Kazu Hirata
Date: 2023-01-25T21:34:09-08:00
New Revision: a5cd202e21e52c1e00963ad5bdfeb83b4fec820e
URL: https://github.com/llvm/llvm-project/commit/a5cd202e21e52c1e00963ad5bdfeb83b4fec820e
DIFF: https://github.com/llvm/llvm-project/commit/a5cd202e21e52c1e00963ad5bdfeb83b4fec820e.diff
LOG: Use llvm::Log2_32 and llvm::Log2_64 instead of llvm::findLastSet (NFC)
For a nonzero argument, llvm::findLastSet(x) is equivalent to
llvm::Log2_32(x) or llvm::Log2_64(x). None of the calls to
llvm::findLastSet in this patch relies on llvm::findLastSet's ability
to return std::numeric_limits<T>::max() on input 0.
Added:
Modified:
clang-tools-extra/clangd/index/dex/PostingList.cpp
clang/lib/CodeGen/SwiftCallingConv.cpp
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Removed:
################################################################################
diff --git a/clang-tools-extra/clangd/index/dex/PostingList.cpp b/clang-tools-extra/clangd/index/dex/PostingList.cpp
index c02d52734972b..691975d2f2244 100644
--- a/clang-tools-extra/clangd/index/dex/PostingList.cpp
+++ b/clang-tools-extra/clangd/index/dex/PostingList.cpp
@@ -132,7 +132,7 @@ bool encodeVByte(DocID Delta, llvm::MutableArrayRef<uint8_t> &Payload) {
assert(Delta != 0 && "0 is not a valid PostingList delta.");
// Calculate number of bytes Delta encoding would take by examining the
// meaningful bits.
- unsigned Width = 1 + llvm::findLastSet(Delta) / BitsPerEncodingByte;
+ unsigned Width = 1 + llvm::Log2_64(Delta) / BitsPerEncodingByte;
if (Width > Payload.size())
return false;
diff --git a/clang/lib/CodeGen/SwiftCallingConv.cpp b/clang/lib/CodeGen/SwiftCallingConv.cpp
index 63d975193c027..055dd37043866 100644
--- a/clang/lib/CodeGen/SwiftCallingConv.cpp
+++ b/clang/lib/CodeGen/SwiftCallingConv.cpp
@@ -728,7 +728,7 @@ void swiftcall::legalizeVectorType(CodeGenModule &CGM, CharUnits origVectorSize,
// The largest size that we're still considering making subvectors of.
// Always a power of 2.
- unsigned logCandidateNumElts = llvm::findLastSet(numElts, llvm::ZB_Undefined);
+ unsigned logCandidateNumElts = llvm::Log2_32(numElts);
unsigned candidateNumElts = 1U << logCandidateNumElts;
assert(candidateNumElts <= numElts && candidateNumElts * 2 > numElts);
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 22d11a96a8646..78adb143453ee 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -2328,7 +2328,7 @@ static bool isSeveralBitsExtractOpFromShr(SDNode *N, unsigned &Opc,
//
// This gets selected into a single UBFM:
//
- // UBFM Value, ShiftImm, findLastSet(MaskImm)
+ // UBFM Value, ShiftImm, Log2_64(MaskImm)
//
if (N->getOpcode() != ISD::SRL)
@@ -2350,7 +2350,7 @@ static bool isSeveralBitsExtractOpFromShr(SDNode *N, unsigned &Opc,
Opc = N->getValueType(0) == MVT::i32 ? AArch64::UBFMWri : AArch64::UBFMXri;
LSB = SrlImm;
- MSB = findLastSet(AndMask, ZB_Undefined);
+ MSB = llvm::Log2_64(AndMask);
return true;
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index c916d5d547c44..9035ae6f7e396 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -761,7 +761,7 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
// There are some rare circumstances where InputAddr is non-zero and
// InputEna can be set to 0. In this case we default to setting LastEna
// to 1.
- LastEna = InputEna ? findLastSet(InputEna) + 1 : 1;
+ LastEna = InputEna ? llvm::Log2_32(InputEna) + 1 : 1;
}
// FIXME: We should be using the number of registers determined during
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