[llvm] 8dfbf8d - [AArch64] Update enabled extensions for Ampere1 core
Philipp Tomsich via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 24 13:19:55 PST 2023
Author: Philipp Tomsich
Date: 2023-01-24T22:19:25+01:00
New Revision: 8dfbf8d1dd172324250f1e6d9c18d4767c0e03e3
URL: https://github.com/llvm/llvm-project/commit/8dfbf8d1dd172324250f1e6d9c18d4767c0e03e3
DIFF: https://github.com/llvm/llvm-project/commit/8dfbf8d1dd172324250f1e6d9c18d4767c0e03e3.diff
LOG: [AArch64] Update enabled extensions for Ampere1 core
The original enablement for the Ampere1 core inadvertently had omitted
that FEAT_RAND is support and errorously claimed that FEAT_MTE was
available.
Adjust the definition of Ampere1 to match reality.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D142395
Added:
Modified:
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/unittests/TargetParser/TargetParserTest.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 818cc411e5fe9..bc4605e7057af 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -486,7 +486,8 @@ inline constexpr CpuInfo CpuInfos[] = {
{"carmel", ARMV8_2A, (AArch64::AEK_CRYPTO | AArch64::AEK_FP16)},
{"ampere1", ARMV8_6A,
(AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_SHA3 |
- AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS)},
+ AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS |
+ AArch64::AEK_RAND)},
// Invalid CPU
{"invalid", INVALID, (AArch64::AEK_INVALID)},
};
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 7d959b6b20e94..14855d0c84ebe 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -1294,7 +1294,8 @@ def ProcessorFeatures {
FeatureNEON, FeaturePerfMon, FeatureSPE,
FeatureFullFP16, FeatureFP16FML, FeatureDotProd];
list<SubtargetFeature> Ampere1 = [HasV8_6aOps, FeatureNEON, FeaturePerfMon,
- FeatureMTE, FeatureSSBS];
+ FeatureSSBS, FeatureRandGen, FeatureSB,
+ FeatureSHA2, FeatureSHA3, FeatureAES];
// ETE and TRBE are future architecture extensions. We temporarily enable them
// by default for users targeting generic AArch64. The extensions do not
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 51f6b64680794..abf139f8487e8 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1330,16 +1330,15 @@ INSTANTIATE_TEST_SUITE_P(
AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_BF16 | AArch64::AEK_I8MM,
"8.5-A"),
- ARMCPUTestParams("ampere1", "armv8.6-a", "crypto-neon-fp-armv8",
- AArch64::AEK_CRC | AArch64::AEK_FP |
- AArch64::AEK_FP16 | AArch64::AEK_SIMD |
- AArch64::AEK_RAS | AArch64::AEK_LSE |
- AArch64::AEK_RDM | AArch64::AEK_RCPC |
- AArch64::AEK_DOTPROD | AArch64::AEK_SHA3 |
- AArch64::AEK_BF16 | AArch64::AEK_SHA2 |
- AArch64::AEK_AES | AArch64::AEK_I8MM |
- AArch64::AEK_SSBS | AArch64::AEK_SB,
- "8.6-A"),
+ ARMCPUTestParams(
+ "ampere1", "armv8.6-a", "crypto-neon-fp-armv8",
+ AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_FP16 |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
+ AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
+ AArch64::AEK_SHA3 | AArch64::AEK_BF16 | AArch64::AEK_SHA2 |
+ AArch64::AEK_AES | AArch64::AEK_I8MM | AArch64::AEK_SSBS |
+ AArch64::AEK_SB | AArch64::AEK_RAND,
+ "8.6-A"),
ARMCPUTestParams(
"neoverse-512tvb", "armv8.4-a", "crypto-neon-fp-armv8",
AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
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