[PATCH] D142466: [AArch64][SME2] Add multi-vector saturating rounding shift right intrinsics

[Caroline via Phabricator via llvm-commits]

CarolineConcatto added a comment.

Hey Kerry, 
Thank you for the patch. I made some comments. 
Some are the comments you thankfully raised on my previous patches.
Thank you for that btw.



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Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:138
+    : Pat<(out_vt (intrinsic in_vt:$Zn1, in_vt:$Zn2, (i32 imm_ty:$i))),
+                  (!cast<Instruction>(name) (REG_SEQUENCE ZPR2, in_vt:$Zn1, zsub0, in_vt:$Zn2, zsub1), imm_ty:$i)>;
+
----------------
Kerry I have a glance and is it correct to assume that we should replace the ZPR4 and ZPR3 in   SME2_Sat_Shift_VG2_Pat and ZPR2Mul2 and  SME2_Sat_Shift_VG4_Pat by ZPR4Mul4


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:554
+    : Pat<(out_vt (intrinsic in_vt:$Zn1, in_vt:$Zn2, (i32 imm_ty:$i))),
+                  (!cast<Instruction>(name) (REG_SEQUENCE ZPR2, in_vt:$Zn1, zsub0, in_vt:$Zn2, zsub1), imm_ty:$i)>;
+
----------------
Just double check again if ZPR2 is the correct one


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Comment at: llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -mattr=+sme2 -mattr=+bf16 -verify-machineinstrs < %s | FileCheck %s
+
----------------
David asked me to remove-mattr=+sve from my tests, because it is not needed. Is it in yours?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D142466/new/

https://reviews.llvm.org/D142466