[PATCH] D142368: [AArch64][SME2] Add multi-vector saturating doubling multiply high intrinsics

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll:5
+
+define { <vscale x 16 x i8>, <vscale x 16 x i8> } @multi_vec_sat_double_mulh_single_x2_s8(<vscale x 16 x i8> %zdn1, <vscale x 16 x i8> %zdn2, <vscale x 16 x i8> %zm) {
+; CHECK-LABEL: multi_vec_sat_double_mulh_single_x2_s8:
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Is it possible to add an `<vscale x 16 x i8> %unused` as the first argument for all these tests, just so that we ensure that multi-vector input starts on a multiple of 2/4?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142368/new/

https://reviews.llvm.org/D142368