[PATCH] D142461: [SPARC] Lower BR_CC to BPr on 64-bit target whenever possible

[Koakuma via Phabricator via llvm-commits]

koakuma added inline comments.


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Comment at: llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp:45
   case Sparc::fixup_sparc_br16_2:
-    return (Value >> 2) & 0xc000;
+    return ((Value >> 2) & 0xc000) << 6;
 
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Not really sure if this is the proper way to do it, but I've found that without the left shift, the integrated assembler would misplace the two upper bits of BPr branch displacements.
Comments?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142461/new/

https://reviews.llvm.org/D142461