[PATCH] D142456: [AArch64] cost mode.

[hassnaaHamdi via Phabricator via llvm-commits]

hassnaa-arm created this revision.
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Add high cost for extending to illegal scalable vector types


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D142456

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp


Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -2059,6 +2059,15 @@
     { ISD::BITCAST, MVT::nxv2i16, MVT::nxv2f16, 0 },
     { ISD::BITCAST, MVT::nxv4i16, MVT::nxv4f16, 0 },
     { ISD::BITCAST, MVT::nxv2i32, MVT::nxv2f32, 0 },
+
+    // Add high cost for extending to illegal -too widen- scalable vectors.
+    { ISD::ZERO_EXTEND, MVT::nxv16i16, MVT::nxv16i8, 16},
+    { ISD::ZERO_EXTEND, MVT::nxv16i32, MVT::nxv16i8, 32},
+    { ISD::ZERO_EXTEND, MVT::nxv16i64, MVT::nxv16i8, 64},
+
+    { ISD::SIGN_EXTEND, MVT::nxv16i16, MVT::nxv16i8, 16},
+    { ISD::SIGN_EXTEND, MVT::nxv16i32, MVT::nxv16i8, 32},
+    { ISD::SIGN_EXTEND, MVT::nxv16i64, MVT::nxv16i8, 64},
   };
 
   if (const auto *Entry = ConvertCostTableLookup(ConversionTbl, ISD,


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