[PATCH] D142395: [AArch64] Update enabled extensions for Ampere1 core
Philipp Tomsich via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 24 03:42:59 PST 2023
philipp.tomsich updated this revision to Diff 491700.
philipp.tomsich added a comment.
v2:
- clang-format
- updated llvm/lib/Target/AArch64/AArch64.td to match
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142395/new/
https://reviews.llvm.org/D142395
Files:
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/unittests/TargetParser/TargetParserTest.cpp
Index: llvm/unittests/TargetParser/TargetParserTest.cpp
===================================================================
--- llvm/unittests/TargetParser/TargetParserTest.cpp
+++ llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1339,7 +1339,7 @@
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SHA3 | AArch64::AEK_BF16 | AArch64::AEK_SHA2 |
AArch64::AEK_AES | AArch64::AEK_I8MM | AArch64::AEK_SSBS |
- AArch64::AEK_SB,
+ AArch64::AEK_SB | AArch64::AEK_RAND,
"8.6-A"),
ARMCPUTestParams(
"neoverse-512tvb", "armv8.4-a", "crypto-neon-fp-armv8",
Index: llvm/lib/Target/AArch64/AArch64.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -1294,7 +1294,8 @@
FeatureNEON, FeaturePerfMon, FeatureSPE,
FeatureFullFP16, FeatureFP16FML, FeatureDotProd];
list<SubtargetFeature> Ampere1 = [HasV8_6aOps, FeatureNEON, FeaturePerfMon,
- FeatureMTE, FeatureSSBS];
+ FeatureSSBS, FeatureRandGen, FeatureSB,
+ FeatureSHA2, FeatureSHA3, FeatureAES4];
// ETE and TRBE are future architecture extensions. We temporarily enable them
// by default for users targeting generic AArch64. The extensions do not
Index: llvm/include/llvm/TargetParser/AArch64TargetParser.h
===================================================================
--- llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -486,7 +486,8 @@
{"carmel", ARMV8_2A, (AArch64::AEK_CRYPTO | AArch64::AEK_FP16)},
{"ampere1", ARMV8_6A,
(AArch64::AEK_AES | AArch64::AEK_SHA2 | AArch64::AEK_SHA3 |
- AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS)},
+ AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS |
+ AArch64::AEK_RAND)},
// Invalid CPU
{"invalid", INVALID, (AArch64::AEK_INVALID)},
};
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