[llvm] 848978d - [AMDGPU][NFC] Apply new naming convention for feature fmacf64

[Mariusz Sikora via llvm-commits]

Author: Mariusz Sikora
Date: 2023-01-24T06:59:50+01:00
New Revision: 848978db4ccb1d2776f434b0a7714a8f115f9c2d

URL: https://github.com/llvm/llvm-project/commit/848978db4ccb1d2776f434b0a7714a8f115f9c2d
DIFF: https://github.com/llvm/llvm-project/commit/848978db4ccb1d2776f434b0a7714a8f115f9c2d.diff

LOG: [AMDGPU][NFC] Apply new naming convention for feature fmacf64

Differential Revision: https://reviews.llvm.org/D142329

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPU.td
    llvm/lib/Target/AMDGPU/GCNSubtarget.h
    llvm/lib/Target/AMDGPU/SIInstructions.td
    llvm/lib/Target/AMDGPU/VOP2Instructions.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index bef819fdf2ee9..9e7dff1842e1f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -536,8 +536,8 @@ def FeatureDLInsts : SubtargetFeature<"dl-insts",
   "Has v_fmac_f32 and v_xnor_b32 instructions"
 >;
 
-def FeatureVFmacF64Inst : SubtargetFeature<"vfmacf64-inst",
-  "HasVFmacF64Inst",
+def FeatureFmacF64Inst : SubtargetFeature<"fmacf64-inst",
+  "HasFmacF64Inst",
   "true",
   "Has v_fmac_f64 instruction"
 >;
@@ -1120,7 +1120,7 @@ def FeatureISAVersion9_0_A : FeatureSet<
    FeatureFmaMixInsts,
    FeatureLDSBankCount32,
    FeatureDLInsts,
-   FeatureVFmacF64Inst,
+   FeatureFmacF64Inst,
    FeatureDot1Insts,
    FeatureDot2Insts,
    FeatureDot3Insts,
@@ -1159,7 +1159,7 @@ def FeatureISAVersion9_4_0 : FeatureSet<
    FeatureFmaMixInsts,
    FeatureLDSBankCount32,
    FeatureDLInsts,
-   FeatureVFmacF64Inst,
+   FeatureFmacF64Inst,
    FeatureDot1Insts,
    FeatureDot2Insts,
    FeatureDot3Insts,
@@ -1730,8 +1730,8 @@ def HasFmaMixInsts : Predicate<"Subtarget->hasFmaMixInsts()">,
 def HasDLInsts : Predicate<"Subtarget->hasDLInsts()">,
   AssemblerPredicate<(all_of FeatureDLInsts)>;
 
-def HasVFmacF64Inst : Predicate<"Subtarget->hasVFmacF64Inst()">,
-  AssemblerPredicate<(all_of FeatureVFmacF64Inst)>;
+def HasFmacF64Inst : Predicate<"Subtarget->hasFmacF64Inst()">,
+  AssemblerPredicate<(all_of FeatureFmacF64Inst)>;
 
 def HasDot1Insts : Predicate<"Subtarget->hasDot1Insts()">,
   AssemblerPredicate<(all_of FeatureDot1Insts)>;

diff  --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index 931ee8890ea79..44f53213a3ecf 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -136,7 +136,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
   bool GFX10_AEncoding = false;
   bool GFX10_BEncoding = false;
   bool HasDLInsts = false;
-  bool HasVFmacF64Inst = false;
+  bool HasFmacF64Inst = false;
   bool HasDot1Insts = false;
   bool HasDot2Insts = false;
   bool HasDot3Insts = false;
@@ -699,7 +699,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
     return HasDLInsts;
   }
 
-  bool hasVFmacF64Inst() const { return HasVFmacF64Inst; }
+  bool hasFmacF64Inst() const { return HasFmacF64Inst; }
 
   bool hasDot1Insts() const {
     return HasDot1Insts;

diff  --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 15c618ffe9958..0c2a13852fcb7 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -2819,7 +2819,7 @@ def : GCNPat <
 >;
 }
 
-let OtherPredicates = [HasVFmacF64Inst] in
+let OtherPredicates = [HasFmacF64Inst] in
 // Don't allow source modifiers. If there are any source modifiers then it's
 // better to select fma instead of fmac.
 def : GCNPat <

diff  --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index ad7f99ef48ae0..a1f99ca3aefab 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -1013,7 +1013,7 @@ defm V_FMAC_LEGACY_F32 : VOP2Inst <"v_fmac_legacy_f32", VOP_MAC_LEGACY_F32>;
 
 } // End SubtargetPredicate = HasFmaLegacy32
 
-let SubtargetPredicate = HasVFmacF64Inst,
+let SubtargetPredicate = HasFmacF64Inst,
     Constraints = "$vdst = $src2",
     DisableEncoding="$src2",
     isConvertibleToThreeAddress = 1,
@@ -2280,9 +2280,9 @@ let AssemblerPredicate = isGFX90APlus, DecoderNamespace = "GFX90A" in {
   }
 } // End AssemblerPredicate = isGFX90APlus, DecoderNamespace = "GFX90A"
 
-let SubtargetPredicate = HasVFmacF64Inst in {
+let SubtargetPredicate = HasFmacF64Inst in {
   defm V_FMAC_F64       : VOP2_Real_e32e64_gfx90a <0x4>;
-} // End SubtargetPredicate = HasVFmacF64Inst
+} // End SubtargetPredicate = HasFmacF64Inst
 
 let SubtargetPredicate = isGFX90APlus, IsSingle = 1 in {
   defm V_MUL_LEGACY_F32 : VOP2_Real_e64_gfx90a <0x2a1>;