[PATCH] D139468: AMDGPU: Clean up LDS-related occupancy calculations

[Nicolai Hähnle via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG10cef708a7cc: AMDGPU: Clean up LDS-related occupancy calculations (authored by nhaehnle).
Herald added a subscriber: StephenFan.

Changed prior to commit:
  https://reviews.llvm.org/D139468?vs=480632&id=491484#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139468/new/

https://reviews.llvm.org/D139468

Files:
  llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
  llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
  llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
  llvm/lib/Target/AMDGPU/R600Subtarget.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
  llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
  llvm/test/CodeGen/AMDGPU/bf16.ll
  llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
  llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
  llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
  llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
  llvm/test/CodeGen/AMDGPU/half.ll
  llvm/test/CodeGen/AMDGPU/idot8s.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
  llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
  llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
  llvm/test/CodeGen/AMDGPU/load-global-i16.ll
  llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
  llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
  llvm/test/CodeGen/AMDGPU/memory_clause.mir
  llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
  llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
  llvm/test/CodeGen/AMDGPU/pr51516.mir
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
  llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
  llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
  llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
  llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
  llvm/test/CodeGen/AMDGPU/sdiv.ll
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/shift-i128.ll
  llvm/test/CodeGen/AMDGPU/shl.ll
  llvm/test/CodeGen/AMDGPU/sra.ll
  llvm/test/CodeGen/AMDGPU/srl.ll
  llvm/test/CodeGen/AMDGPU/ssubsat.ll
  llvm/test/CodeGen/AMDGPU/udiv.ll
  llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll