[PATCH] D141606: [AArch64] Remove AES, SHA2, SHA3 and SM4 features from armv8.6-a+
Pavel Iliin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 23 10:10:49 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5474d7d93271: [AArch64] Function multi-versioning release notes added. NFC. (authored by ilinpv).
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Changed prior to commit:
https://reviews.llvm.org/D141606?vs=489558&id=491430#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D141606/new/
https://reviews.llvm.org/D141606
Files:
clang/docs/ReleaseNotes.rst
llvm/docs/ReleaseNotes.rst
Index: llvm/docs/ReleaseNotes.rst
===================================================================
--- llvm/docs/ReleaseNotes.rst
+++ llvm/docs/ReleaseNotes.rst
@@ -133,6 +133,10 @@
* Added support for the Neoverse V2 CPU.
* Added support for assembly for RME MEC (Memory Encryption Contexts).
* Added codegen support for the Armv8.3 Complex Number extension.
+* Implemented `Function Multi Versioning
+ <https://arm-software.github.io/acle/main/acle.html#function-multi-versioning>`_
+ in accordance with Arm C Language Extensions specification. Currently in Beta
+ state.
Changes to the AMDGPU Backend
-----------------------------
Index: clang/docs/ReleaseNotes.rst
===================================================================
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -614,6 +614,15 @@
memory placement. It emits a warning if something in the code provably prevents
an instance from a read-only memory placement.
+- Introduced new attribute ``__attribute__((target_version("cpu_features")))``
+ and expanded the functionality of the existing attribute
+ ``__attribute__((target_clones("cpu_features1","cpu_features2",...)))`` to
+ support Function Multi Versioning on AArch64 target. It detects at runtime
+ which function versions are supported by CPU and calls the one with highest
+ priority. Refer to `clang attributes
+ <https://clang.llvm.org/docs/AttributeReference.html#target-version>`_ for
+ more details.
+
Windows Support
---------------
- For the MinGW driver, added the options ``-mguard=none``, ``-mguard=cf`` and
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