[PATCH] D142348: [RISCV][Docs] Document code generation for vector extension

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


================
Comment at: llvm/docs/RISCV/RISCVVectorExtension.rst:316
+
+These ``_VL`` suffixed nodes are counterparts to their pseudo instructions, but don't specify LMUL and are tagged with a ``VL`` operand, which is 4 here.
+It will be later used by the pass inserting ``vsetvli`` so that it can statically set ``VL`` to the number of elements in the fixed-length vector.
----------------
Am I correct in understanding that the main reason for the `VL` nodes is that it defers having to select an `LMUL`? Or is there another reason as to why they are used vs just selecting a pseudo instruction directly and using a constant for its VL operand


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142348/new/

https://reviews.llvm.org/D142348