[llvm] 9bdfd7c - [AMDGPU] Regenerate extend-phi-subrange-not-in-parent.mir

[Pierre van Houtryve via llvm-commits]

Author: Pierre van Houtryve
Date: 2023-01-16T02:29:24-05:00
New Revision: 9bdfd7c8db2066e5b50b9599248660bdf8eda7f0

URL: https://github.com/llvm/llvm-project/commit/9bdfd7c8db2066e5b50b9599248660bdf8eda7f0
DIFF: https://github.com/llvm/llvm-project/commit/9bdfd7c8db2066e5b50b9599248660bdf8eda7f0.diff

LOG: [AMDGPU] Regenerate extend-phi-subrange-not-in-parent.mir

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir b/llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
index 44d8c81db1aa..31e19475a40e 100644
--- a/llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
+++ b/llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
@@ -26,10 +26,10 @@ body:             |
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   dead %3:vreg_64 = IMPLICIT_DEF
+  ; CHECK-NEXT:   dead [[DEF2:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; CHECK-NEXT:   S_NOP 0, implicit [[DEF1]]
   ; CHECK-NEXT:   S_NOP 0, implicit [[DEF1]]
-  ; CHECK-NEXT:   [[DEF2:%[0-9]+]]:vreg_1024_align2 = IMPLICIT_DEF
+  ; CHECK-NEXT:   [[DEF3:%[0-9]+]]:vreg_1024_align2 = IMPLICIT_DEF
   ; CHECK-NEXT:   S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2:
@@ -49,7 +49,7 @@ body:             |
   ; CHECK-NEXT: bb.4:
   ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.5(0x40000000)
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   [[DEF2:%[0-9]+]]:av_1024_align2 = IMPLICIT_DEF
+  ; CHECK-NEXT:   [[DEF3:%[0-9]+]]:av_1024_align2 = IMPLICIT_DEF
   ; CHECK-NEXT:   S_CBRANCH_VCCNZ %bb.3, implicit undef $vcc
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.5: