[llvm] 2d73295 - [X86] Add AVX512FP16 test coverage to splat(fpext) tests.

[Freddy Ye via llvm-commits]

Author: Freddy Ye
Date: 2023-01-16T10:19:19+08:00
New Revision: 2d73295c43442302bda99a09708fca6265742a13

URL: https://github.com/llvm/llvm-project/commit/2d73295c43442302bda99a09708fca6265742a13
DIFF: https://github.com/llvm/llvm-project/commit/2d73295c43442302bda99a09708fca6265742a13.diff

LOG: [X86] Add AVX512FP16 test coverage to splat(fpext) tests.

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/prefer-fpext-splat.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/prefer-fpext-splat.ll b/llvm/test/CodeGen/X86/prefer-fpext-splat.ll
index 0cd4472f58b2..4f0c2bb65d1d 100644
--- a/llvm/test/CodeGen/X86/prefer-fpext-splat.ll
+++ b/llvm/test/CodeGen/X86/prefer-fpext-splat.ll
@@ -1,8 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown                           | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx               | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2              | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown                              | FileCheck %s --check-prefixes=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx                  | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2                 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl    | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512FP16
 
 define <2 x double> @prefer_f32_v2f64(ptr %p) nounwind {
 ; SSE-LABEL: prefer_f32_v2f64:
@@ -56,6 +57,13 @@ define <4 x double> @prefer_f32_v4f64(ptr %p) nounwind {
 ; AVX512-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
 ; AVX512-NEXT:    vbroadcastsd %xmm0, %ymm0
 ; AVX512-NEXT:    retq
+;
+; AVX512FP16-LABEL: prefer_f32_v4f64:
+; AVX512FP16:       # %bb.0: # %entry
+; AVX512FP16-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX512FP16-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX512FP16-NEXT:    vbroadcastsd %xmm0, %ymm0
+; AVX512FP16-NEXT:    retq
 entry:
   %0 = load float, ptr %p, align 4
   %vecinit.i = insertelement <4 x float> undef, float %0, i64 0
@@ -99,6 +107,13 @@ define <4 x float> @prefer_f16_v4f32(ptr %p) nounwind {
 ; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
 ; AVX512-NEXT:    vbroadcastss %xmm0, %xmm0
 ; AVX512-NEXT:    retq
+;
+; AVX512FP16-LABEL: prefer_f16_v4f32:
+; AVX512FP16:       # %bb.0: # %entry
+; AVX512FP16-NEXT:    vmovsh (%rdi), %xmm0
+; AVX512FP16-NEXT:    vcvtsh2ss %xmm0, %xmm0, %xmm0
+; AVX512FP16-NEXT:    vbroadcastss %xmm0, %xmm0
+; AVX512FP16-NEXT:    retq
 entry:
   %0 = load half, ptr %p, align 4
   %vecinit.i = insertelement <4 x half> undef, half %0, i64 0
@@ -144,6 +159,13 @@ define <8 x float> @prefer_f16_v8f32(ptr %p) nounwind {
 ; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
 ; AVX512-NEXT:    vbroadcastss %xmm0, %ymm0
 ; AVX512-NEXT:    retq
+;
+; AVX512FP16-LABEL: prefer_f16_v8f32:
+; AVX512FP16:       # %bb.0: # %entry
+; AVX512FP16-NEXT:    vmovsh (%rdi), %xmm0
+; AVX512FP16-NEXT:    vcvtsh2ss %xmm0, %xmm0, %xmm0
+; AVX512FP16-NEXT:    vbroadcastss %xmm0, %ymm0
+; AVX512FP16-NEXT:    retq
 entry:
   %0 = load half, ptr %p, align 4
   %vecinit.i = insertelement <8 x half> undef, half %0, i64 0
@@ -191,6 +213,13 @@ define <2 x double> @prefer_f16_v2f64(ptr %p) nounwind {
 ; AVX512-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
 ; AVX512-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
 ; AVX512-NEXT:    retq
+;
+; AVX512FP16-LABEL: prefer_f16_v2f64:
+; AVX512FP16:       # %bb.0: # %entry
+; AVX512FP16-NEXT:    vmovsh (%rdi), %xmm0
+; AVX512FP16-NEXT:    vcvtsh2sd %xmm0, %xmm0, %xmm0
+; AVX512FP16-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
+; AVX512FP16-NEXT:    retq
 entry:
   %0 = load half, ptr %p, align 4
   %vecinit.i = insertelement <2 x half> undef, half %0, i64 0
@@ -240,6 +269,13 @@ define <4 x double> @prefer_f16_v4f64(ptr %p) nounwind {
 ; AVX512-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
 ; AVX512-NEXT:    vbroadcastsd %xmm0, %ymm0
 ; AVX512-NEXT:    retq
+;
+; AVX512FP16-LABEL: prefer_f16_v4f64:
+; AVX512FP16:       # %bb.0: # %entry
+; AVX512FP16-NEXT:    vmovsh (%rdi), %xmm0
+; AVX512FP16-NEXT:    vcvtsh2sd %xmm0, %xmm0, %xmm0
+; AVX512FP16-NEXT:    vbroadcastsd %xmm0, %ymm0
+; AVX512FP16-NEXT:    retq
 entry:
   %0 = load half, ptr %p, align 4
   %vecinit.i = insertelement <4 x half> undef, half %0, i64 0