[PATCH] D141439: [AARCH64][SVE] Do not optimize vector conversions

[zino benaissa via Phabricator via llvm-commits]

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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14229
 
 bool AArch64TargetLowering::optimizeExtendOrTruncateConversion(Instruction *I,
                                                                Loop *L) const {
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paulwalker-arm wrote:
> For clarification, is this a bad optimisation when SVE is available? or is it the case the current code generation for SVE is suboptimal? 
In a nutshell I don't know. Is the zext peep that rely on tbl instruction is always profitable even when targeting NEON? I have limited access to ARM HW, this peep performs slower on my small toy test.

On SVE, disabling the peep,  uunpklo is generated and it is fast enough. Please feel free to propose better code generation options. thanks




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  https://reviews.llvm.org/D141439/new/

https://reviews.llvm.org/D141439